dri-devel June 2022

dri-devel@lists.freedesktop.org

332 participants
697 discussions

[ANNOUNCE] libdrm 2.4.111
by Dave Airlie 03 Jun '22

03 Jun '22

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 libdrm 2.4.111, just a few things built up, and drop libkms. Alex Deucher (3): test/amdgpu: only disable deadlock tests on asics without GPU reset amdgpu: add marketing names from 21.50 amdgpu: add marketing names from 22.10 Andrey Grodzovsky (1): tests/amdgpu/hotunplu: Enable hotunplug tests. Daniel Stone (2): drm/atomic: Stable sort for atomic request de-duplication libkms: Remove libkms completely Dave Airlie (1): build: bump version to 2.4.111 Dylan Baker (9): meson: use dictionary kwargs meson: add override_dependency when possible meson: switch the meson builtin for symbol visiblity meson: switch to cc.get_supported_arguments meson: use more standard formatting for better readability meson: use cc.check_header instead of open coding meson: use cc.has_function_attribute instead of open coding meson: use the modern interface for pkg.generate meson: use summary() instead of message Eleni Maria Stea (3): xf86drm.c: fix C99 warning modeprint, modetest, proptest: cast __u64 to uint64_t tests/modeprint: fix argument type Eric Engestrom (1): use standard `__typeof__()` instead of GNU extension `typeof()` Flora Cui (2): tests/amdgpu: add draw test for gfx10 tests/amdgpu: add dispatch test for gfx10 Guchun Chen (2): tests/amdgpu: Add VCN test support for Biege Goby tests/amdgpu: use appropriate ring for different asics Karol Herbst (1): nouveau: add ioctl wrapper to check for dead channels Lu Jiacheng (1): tests/amdgpu: Add test suite CP DMA Matt Turner (2): man: Fix some typos man: Add formatting to drmModeGetConnector reference Raviteja Goud Talla (1): intel: sync i915_pciids.h with kernel Samuel Pitoiset (4): amdgpu: update_drm.h for new CTX OP to set/get stable pstates amdgpu: implement new CTX OP to set/get stable pstates tests/amdgpu: add a test for new CTX OP to get/set stable pstates build: bump version to 2.4.110 Sathishkumar S (3): tests/amdgpu: add jpeg tests support tests/amdgpu: enable jpeg test based on ip query tests/amdgpu: enable vcn test based on ip query Simon Ser (1): releasing: s/master/main/ Tejas Upadhyay (2): intel: Add support for ADL-N intel: Add support for RPLP Thierry Reding (25): tegra: Indent according to .editorconfig tegra: Remove unused IOCTL implementations tegra: Extract common buffer object allocation code tegra: Fix mmap() of GEM buffer objects tegra: Add flink helpers tegra: Add PRIME support helpers tegra: Make API more consistent tegra: Install tegra-openclose test tegra: Update for new UABI tegra: Include private.h in list of source files tegra: Add channel APIs tegra: Add job and push buffer APIs tegra: Add syncpoint APIs tests: tegra: Add helper library for tests tests: tegra: Add gr2d-fill test tests: tegra: Add syncpt-wait test tests: tegra: Add syncpoint timeout test tests: tegra: Add VIC support tests: tegra: Add VIC 3.0 support tests: tegra: Add VIC 4.0 support tests: tegra: Add VIC 4.1 support tests: tegra: Add VIC 4.2 support tests: tegra: Add VIC clear test tests: tegra: Add VIC blit test tests: tegra: Add VIC flip test ravitejax (1): intel: Add support for RPLS platform git tag: libdrm-2.4.111 https://dri.freedesktop.org/libdrm/libdrm-2.4.111.tar.xz SHA256: 1ad7164f77424de6f4ecba7c262bde196a214c6e19a6fbf497f0815f4d7ab2a9 libdrm-2.4.111.tar.xz SHA512: 17e92e9e4ded8031ac222764bed7e9ff430a1a377f5e435f6b62b4a7f45cb4c4b769b3b79fbcba11512c1ac973abf8cdcca8e0b9659ae095e915d3d5efcf5516 libdrm-2.4.111.tar.xz PGP: https://dri.freedesktop.org/libdrm/libdrm-2.4.111.tar.xz.sig -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmKZicgACgkQDHTzWXnE hr6CrA//duEhO2bu78TAcOfZ4NaSghV00jYQOblkcOFgfjmrCdSuqG2k2raPif4t AwWb1ZgYLDwmkMVEXytFwVkzRsdU8QQrofvML1Q7t3Q8opLNV/8kESqLnelOLmZp 8fVpPiETVZIqEwKFASb1nzTdUmD2R8tV++BX5w/zUeErFIu/4nqEdVJPgOh337ko VUKvvMb3+ockbJcRud4DjC6P/3WNkYJHz/uJe2UcaB4+SCg2M7HtofQplj/c3bLv NDEoxliRUDKj7+agpHS9RkJYfnIOT2jf6O9eAxxexrqS2p801Vb97uHFwjbxrmJK XteXbk4v4k/TnkmJkr8xQs0miDCSVSuSMg4orRXyfCcbPajTUDRWrEWaYWkZz5Z2 8pYHrijpEL/ISLmZkiviYLO/61NsGqOtDB+kCpagH/qw4/xa6FyfM7kvo4f9uM8A PKqXd4dqUyJ5FgM3LODwbInf1G8VnHcTvxQLSZzwk8w3HezQqBmyN86C2y1mGN91 RyhYTynXugigoqlrCn2p2/Yf8ld73jR16HBXpvx8kTtY+/i5UoCsNd+QiyvmJpXF E6AkdUS6zgUyTSbYo1wkSOwXvTEAcqJpI9FUOd90KHiOww7NFu6be0wYZb/FsQ+B iP+oPmUG7L0D0I8WEcbgjkXeuV35nQT70kG0rSPbfrGcYo0FcKA= =cVIr -----END PGP SIGNATURE-----

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[PATCH] drm/i915/pvc: Add Wa_16015675438:pvc
by Matt Roper 02 Jun '22

02 Jun '22

From: Badal Nilawar <badal.nilawar(a)intel.com> Even though PVC doesn't have an RCS engine, this workaround updates a register in the 0x2xxx range that traditionally belongs to the RCS. We need to set a special flag to tell the GuC that the presence of an "RCS" register on a CCS save/restore list is okay/expected. Cc: Stuart Summers <stuart.summers(a)intel.com> Cc: Lucas De Marchi <lucas.demarchi(a)intel.com> Signed-off-by: Badal Nilawar <badal.nilawar(a)intel.com> Signed-off-by: Matt Roper <matthew.d.roper(a)intel.com> --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++ drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++++ drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 + 4 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 6aa1ceaa8d27..1986579b18ba 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -140,6 +140,7 @@ #define FF_SLICE_CS_CHICKEN2 _MMIO(0x20e4) #define GEN9_TSG_BARRIER_ACK_DISABLE (1 << 8) #define GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE (1 << 10) +#define GEN12_PERF_FIX_BALANCING_CFE_DISABLE REG_BIT(15) #define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec) #define FF_DOP_CLOCK_GATE_DISABLE REG_BIT(1) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 6e875d4f5f65..eb0598593724 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -2698,6 +2698,11 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li /* Wa_22014226127:dg2,pvc */ wa_write_or(wal, LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE); } + + /* Wa_16015675438:pvc */ + if (IS_PVC_BD_STEP(i915, STEP_B0, STEP_FOREVER)) + wa_masked_en(wal, FF_SLICE_CS_CHICKEN2, + GEN12_PERF_FIX_BALANCING_CFE_DISABLE); } static void diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 2c4ad4a65089..7043cf5a666a 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -327,6 +327,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc) IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_FOREVER)) flags |= GUC_WA_CONTEXT_ISOLATION; + /* Wa_16015675438:pvc */ + if (IS_PVC_BD_STEP(gt->i915, STEP_B0, STEP_FOREVER)) + flags |= GUC_WA_RCS_REGS_IN_CCS_REGS_LIST; + return flags; } diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h index 42cb7a9a6199..b3c9a9327f76 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h @@ -105,6 +105,7 @@ #define GUC_WA_PRE_PARSER BIT(14) #define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17) #define GUC_WA_POLLCS BIT(18) +#define GUC_WA_RCS_REGS_IN_CCS_REGS_LIST BIT(21) #define GUC_CTL_FEATURE 2 #define GUC_CTL_ENABLE_SLPC BIT(2) -- 2.35.3

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XDC 2022: Registration & Call for Presentations still open!
by Lyude Paul 02 Jun '22

02 Jun '22

Hello! This is just a reminder that the CFP for XDC in 2022 is still open! The 2022 X.Org Developers Conference is being held in conjunction with the 2022 Wine Developers Conference. This is a meeting to bring together developers working on all things open graphics (Linux kernel, Mesa, DRM, Wayland, X11, etc.) as well as developers for the Wine Project, a key consumer of open graphics. Registration & Call for Proposals are now open for both XDC 2022 and WineConf 2022, which will take place on October 4-6, 2022 in Minneapolis, Minnesota, USA. https://xdc2022.x.org As usual, the conference is free of charge and open to the general public. If you plan on attending, please make sure to register as early as possible! In order to register as attendee, you will therefore need to do it via the XDC website: https://indico.freedesktop.org/event/2/registrations/2/ In addition to registration, the CfP is now open for talks, workshops and demos at XDC 2022. While any serious proposal will be gratefully considered, topics of interest to X.Org and freedesktop.org developers are encouraged. The program focus is on new development, ongoing challenges and anything else that will spark discussions among attendees in the hallway track. We are open to talks across all layers of the graphics stack, from the kernel to desktop environments / graphical applications and about how to make things better for the developers who build them. Head to the CfP page to learn more: https://indico.freedesktop.org/event/2/abstracts/ The deadline for submissions is Monday July 4th, 2022. Check out our Reimbursement Policy to accept speaker expenses for X.Org events like XDC 2022: https://www.x.org/wiki/XorgFoundation/Policies/Reimbursement/ If you have any questions, please send me an email to xdc(a)codeweavers.com, adding on CC the X.org board (board at foundation.x.org). And don't forget, you can follow us on Twitter for all the latest updates and to stay connected: https://twitter.com/XOrgDevConf Best regards, Lyude Paul, on behalf of X.org

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[PATCH v3 0/7] drm/msm: clean up the hw catalog init
by Dmitry Baryshkov 02 Jun '22

02 Jun '22

Replace superfluous cfg_init functions, which just assign a static config to the struct dpu_mdss_cfg, with static instances of struct dpu_mdss_cfg. Changes since v2: - Add DPU_MIXER_COMBINED_ALPHA to sc7180's mixer features mask (noted by Abhinav). Changes since v1: - Turn catalog->perf and catalog->dma_cfg to be pointers, otherwise clang complains that they are not constant. Dmitry Baryshkov (7): drm/msm/dpu: use feature bit for LM combined alpha check drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog drm/msm/dpu: remove hwversion field from data structures drm/msm/dpu: change catalog->perf to be a const pointer drm/msm/dpu: change catalog->dma_cfg to be a const pointer drm/msm/dpu: constify struct dpu_mdss_cfg drm/msm/dpu: make dpu hardware catalog static const drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 24 +- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +- .../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 12 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 502 ++++++++---------- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1 - .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 5 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 7 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 1 - .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +- 27 files changed, 283 insertions(+), 359 deletions(-) -- 2.35.1

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[PATCH 3/3] drm/amdgpu/dm: Drop != NULL check in dm_mst_get_pbn_divider()
by Lyude Paul 02 Jun '22

02 Jun '22

A lot of code in amdgpu seems to sprinkle in if (foo != NULL) … Checks pretty much all over the place, many times in locations where it's clear foo (whatever foo may be) should never be NULL unless we've run into a programming error. This is definitely one of those places, as dm_mst_get_pbn_divider() should never be getting called with a NULL dc_link pointer. The problem with this code pattern is that many times the places I've seen it used in amdgpu have no real error handling. This is actually quite bad, if we try to avoid the NULL pointer and instead simply skip any code that was expecting a valid pointer - we're already in undefined territory. Subsequent code we execute may have expected sideaffects from the code we skipped that are no longer present, which leads to even more unpredictable behavior then a simple segfault. This could be silent errors or even just another segfault somewhere else. If we simply segfault though, that's not good either. But unlike the former solution, no subsequent code in the kernel thread will execute - and we will likely even get a clear backtrace from the invalid memory access. Of course, the preferred approach is to simply handle the possibility of both NULL and non-NULL pointers with nice error handling code. However, that's not always desirable or even possible, and in those cases it's likely just better to fail predictably rather than unpredictably. This code is a nice example of that - if link is NULL, you'll return a PBN divisor of 0. And thus, you've simply traded in your potential segfault for a potential divide by 0 error. This was something I actually managed to hit while working on the legacy MST removal work. Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 1259f2f7a8f9..35c7def8f2bd 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -537,9 +537,6 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, int dm_mst_get_pbn_divider(struct dc_link *link) { - if (!link) - return 0; - return dc_link_bandwidth_kbps(link, dc_link_get_link_cap(link)) / (8 * 1000 * 54); } -- 2.35.3

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[PATCH 2/3] drm/amdgpu/dm/mst: Stop grabbing mst_mgr->lock in pre_compute_mst_dsc_configs_for_state()
by Lyude Paul 02 Jun '22

02 Jun '22

This lock is only needed if you're iterating through the in-memory topology (e.g. drm_dp_mst_branch->ports, drm_dp_mst_port->mstb, etc.). This doesn't actually seem to be what's going on here though, so we can just drop this lock. Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index cb3b0e08acc4..1259f2f7a8f9 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -1112,16 +1112,12 @@ static bool if (!is_dsc_need_re_compute(state, dc_state, stream->link)) continue; - mutex_lock(&aconnector->mst_mgr.lock); if (!compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, - &link_vars_start_index)) { - mutex_unlock(&aconnector->mst_mgr.lock); + &link_vars_start_index)) return false; - } - mutex_unlock(&aconnector->mst_mgr.lock); for (j = 0; j < dc_state->stream_count; j++) { if (dc_state->streams[j]->link == stream->link) -- 2.35.3

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[PATCH 1/3] drm/amdgpu/dm/mst: Stop grabbing mst_mgr->lock in compute_mst_dsc_configs_for_state()
by Lyude Paul 02 Jun '22

02 Jun '22

Noticed this while trying to update amdgpu for the non-atomic MST removal changes - for some reason we appear to grab mst_mgr->lock before computing mst DSC configs. This is wrong though - mst_mgr->lock is only needed while traversing the actual MST topology state - which is not typically something that DRM drivers should be doing themselves anyway. Signed-off-by: Lyude Paul <lyude(a)redhat.com> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 9221b6690a4a..cb3b0e08acc4 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -1056,13 +1056,10 @@ bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, if (!is_dsc_need_re_compute(state, dc_state, stream->link)) continue; - mutex_lock(&aconnector->mst_mgr.lock); if (!compute_mst_dsc_configs_for_link(state, dc_state, stream->link, vars, &link_vars_start_index)) { - mutex_unlock(&aconnector->mst_mgr.lock); return false; } - mutex_unlock(&aconnector->mst_mgr.lock); for (j = 0; j < dc_state->stream_count; j++) { if (dc_state->streams[j]->link == stream->link) -- 2.35.3

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[PATCH v2 0/7] drm/msm: clean up the hw catalog init
by Dmitry Baryshkov 02 Jun '22

02 Jun '22

Replace superfluous cfg_init functions, which just assign a static config to the struct dpu_mdss_cfg, with static instances of struct dpu_mdss_cfg. Changes since v1: - Turn catalog->perf and catalog->dma_cfg to be pointers, otherwise clang complains that they are not constant. Dmitry Baryshkov (7): drm/msm/dpu: use feature bit for LM combined alpha check drm/msm/dpu: move VBIF_XINL_QOS_LVL_REMAP size to hw_catalog drm/msm/dpu: remove hwversion field from data structures drm/msm/dpu: change catalog->perf to be a const pointer drm/msm/dpu: change catalog->dma_cfg to be a const pointer drm/msm/dpu: constify struct dpu_mdss_cfg drm/msm/dpu: make dpu hardware catalog static const drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 24 +- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 +- .../drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 12 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 500 ++++++++---------- .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c | 1 - .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 5 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 7 +- .../gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c | 1 - .../gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 2 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c | 5 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 6 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 20 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 2 +- 27 files changed, 282 insertions(+), 358 deletions(-) -- 2.35.1

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Re: [PATCH 10/14] dt-bindings: power: supply: Add Mediatek MT6370 Charger binding documentation
by Krzysztof Kozlowski 02 Jun '22

02 Jun '22

On 31/05/2022 12:42, ChiaEn Wu wrote: > From: ChiaEn Wu <chiaen_wu(a)richtek.com> > Subject - remove "binding documentation". It's already implied by prefix. > Add Mediatek MT6370 Charger binding documentation. > > Signed-off-by: ChiaEn Wu <chiaen_wu(a)richtek.com> > --- > .../power/supply/mediatek,mt6370-charger.yaml | 60 +++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml > > diff --git a/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml b/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml > new file mode 100644 > index 000000000000..9d5c4487ca9c > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml > @@ -0,0 +1,60 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/supply/mediatek,mt6370-charger.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek MT6370 Battery Charger > + > +maintainers: > + - ChiaEn Wu <chiaen_wu(a)richtek.com> > + > +description: | > + This module is part of the MT6370 MFD device. > + Provides Battery Charger, Boost for OTG devices and BC1.2 detection. > + > +properties: > + compatible: > + const: mediatek,mt6370-charger > + > + interrupts: > + description: | > + Specify what irqs are needed to be handled by MT6370 Charger driver. IRQ > + "MT6370_IRQ_CHG_MIVR", "MT6370_IRQ_ATTACH" and "MT6370_IRQ_OVPCTRL_UVP_D" > + are required. > + items: > + - description: BC1.2 done irq for mt6370 charger > + - description: usb plug in irq for mt6370 charger > + - description: mivr irq for mt6370 charger s/for mt6370 charger// in each item > + > + interrupt-names: > + items: > + - const: attach_i > + - const: uvp_d_evt > + - const: mivr > + > + io-channels: > + description: | > + Use ADC channel to read vbus, ibus, ibat, etc., info. Ibus ADC channel > + is required. Constraints (e.g. maxItems) are needed. > + > + usb-otg-vbus: Let's keep the same name as in MT6360: usb-otg-vbus-regulator > + type: object > + description: OTG boost regulator. > + $ref: /schemas/regulator/regulator.yaml# > + > + properties: > + enable-gpio: > + maxItems: 1 > + description: | > + Specify a valid 'enable' gpio for the regulator and it's optional This description is pointless - does not bring any more information. You repeat the schema. Please, avoid such descriptions. > + > +required: > + - compatible > + - interrupts > + - interrupt-names > + - io-channels > + > +additionalProperties: false How about example? Or is it going to be in MFD schema? Best regards, Krzysztof

2 1

[PATCH] drm/tegra: dc: rgb: Fix refcount leak in tegra_dc_rgb_probe
by Miaoqian Lin 02 Jun '22

02 Jun '22

of_get_child_by_name() returns a node pointer with refcount incremented, we should use of_node_put() on it when not need anymore. So add of_node_put() in error paths. Fixes: format:d8f4a9eda006 ("drm: Add NVIDIA Tegra20 support") Signed-off-by: Miaoqian Lin <linmq006(a)gmail.com> --- drivers/gpu/drm/tegra/rgb.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c index ff8fce36d2aa..cef2b1b72385 100644 --- a/drivers/gpu/drm/tegra/rgb.c +++ b/drivers/gpu/drm/tegra/rgb.c @@ -196,12 +196,16 @@ int tegra_dc_rgb_probe(struct tegra_dc *dc) int err; np = of_get_child_by_name(dc->dev->of_node, "rgb"); - if (!np || !of_device_is_available(np)) - return -ENODEV; + if (!np || !of_device_is_available(np)) { + err = -ENODEV; + goto err_put_node; + } rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL); - if (!rgb) - return -ENOMEM; + if (!rgb) { + err = -ENOMEM; + goto err_put_node; + } rgb->output.dev = dc->dev; rgb->output.of_node = np; @@ -209,31 +213,34 @@ int tegra_dc_rgb_probe(struct tegra_dc *dc) err = tegra_output_probe(&rgb->output); if (err < 0) - return err; + goto err_put_node; + rgb->clk = devm_clk_get(dc->dev, NULL); if (IS_ERR(rgb->clk)) { dev_err(dc->dev, "failed to get clock\n"); - return PTR_ERR(rgb->clk); + err = PTR_ERR(rgb->clk); + goto err_put_node; } rgb->clk_parent = devm_clk_get(dc->dev, "parent"); if (IS_ERR(rgb->clk_parent)) { dev_err(dc->dev, "failed to get parent clock\n"); - return PTR_ERR(rgb->clk_parent); + err = PTR_ERR(rgb->clk_parent); + goto err_put_node; } err = clk_set_parent(rgb->clk, rgb->clk_parent); if (err < 0) { dev_err(dc->dev, "failed to set parent clock: %d\n", err); - return err; + goto err_put_node; } rgb->pll_d_out0 = clk_get_sys(NULL, "pll_d_out0"); if (IS_ERR(rgb->pll_d_out0)) { err = PTR_ERR(rgb->pll_d_out0); dev_err(dc->dev, "failed to get pll_d_out0: %d\n", err); - return err; + goto err_put_node; } if (dc->soc->has_pll_d2_out0) { @@ -241,13 +248,17 @@ int tegra_dc_rgb_probe(struct tegra_dc *dc) if (IS_ERR(rgb->pll_d2_out0)) { err = PTR_ERR(rgb->pll_d2_out0); dev_err(dc->dev, "failed to get pll_d2_out0: %d\n", err); - return err; + goto err_put_node; } } dc->rgb = &rgb->output; return 0; + +err_put_node: + of_node_put(np); + return err; } int tegra_dc_rgb_remove(struct tegra_dc *dc) -- 2.25.1

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dri-devel June 2022