[PATCH 4/5] Documentation/gpu: Add more information about GC
Rodrigo Siqueira
siqueira at igalia.com
Sat Aug 16 15:31:41 UTC 2025
This commit introduces a diagram and a set of information that details
the different sets of schedulers available in the SE.
Cc: Alex Deucher <alexander.deucher at amd.com>
Cc: Christian König <christian.koenig at amd.com>
Cc: Timur Kristóf <timur.kristof at gmail.com>
Signed-off-by: Rodrigo Siqueira <siqueira at igalia.com>
---
Documentation/gpu/amdgpu/gc/cu.svg | 437 ++++++++++++++++++++++++++
Documentation/gpu/amdgpu/gc/index.rst | 28 +-
2 files changed, 459 insertions(+), 6 deletions(-)
create mode 100644 Documentation/gpu/amdgpu/gc/cu.svg
diff --git a/Documentation/gpu/amdgpu/gc/cu.svg b/Documentation/gpu/amdgpu/gc/cu.svg
new file mode 100644
index 000000000000..10bdb3e24b65
--- /dev/null
+++ b/Documentation/gpu/amdgpu/gc/cu.svg
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diff --git a/Documentation/gpu/amdgpu/gc/index.rst b/Documentation/gpu/amdgpu/gc/index.rst
index ff6e9ef5cbee..7110b4966729 100644
--- a/Documentation/gpu/amdgpu/gc/index.rst
+++ b/Documentation/gpu/amdgpu/gc/index.rst
@@ -10,16 +10,32 @@ producer-consumer problem, where the CPU fills out a buffer with operations
the buffer are called Command Packets, which can be summarized as a compressed
way of transmitting command information to the graphics controller.
+In the diagram below, you can see an overview of the GC, along with additional
+information about the Shader Engine (SE).
+
+.. kernel-figure:: cu.svg
+
+First of all, note that the GC can have multiple SEs, depending on the specific
+GPU/APU, and each SE has multiple Compute Units (CU). From the diagram, you can
+see that CUs have a block named Schedulers. The reason the name is in plural is
+because this block is a combination of different micro-schedules: CP, CPF, CPC,
+and CPG.
+
The component that acts as the front end between the CPU and the GPU is called
-the Command Processor (CP). This component is responsible for providing greater
+CP (Command Processor). This component is responsible for providing greater
flexibility to the GC since CP makes it possible to program various aspects of
the GPU pipeline. CP also coordinates the communication between the CPU and GPU
via a mechanism named **Ring Buffers**, where the CPU appends information to
-the buffer while the GPU removes operations. It is relevant to highlight that a
-CPU can add a pointer to the Ring Buffer that points to another region of
-memory outside the Ring Buffer, and CP can handle it; this mechanism is called
-**Indirect Buffer (IB)**. CP receives and parses the Command Streams (CS), and
-writes the operations to the correct hardware blocks.
+the buffer while the GPU removes operations. Finally, CP is also responsible
+for handling Indirect Buffers (IB).
+
+After CP completes the first set of processing, which includes separate command
+packets specific to GFX and Compute, other blocks step in. To handle commands
+for the compute block, CPC (Command Processor Command) takes over, and for
+handling Graphics operations, the CPG (Command Processor Graphics) takes
+action. Another essential block to ensure the optimal utilization of CPC and
+CPG is the CPF (Command Processor Fetcher), which helps these blocks to be
+constantly fed.
Graphics (GFX) and Compute Microcontrollers
-------------------------------------------
--
2.47.2
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