[Bug 92760] Add FP64 support to the i965 shader backends

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=92760

--- Comment #39 from Kenneth Graunke <kenneth at whitecape.org> ---
There are a few bugs left with INTEL_SCALAR_GS=1 - I just filed bugs for them:

https://bugs.freedesktop.org/show_bug.cgi?id=93859
https://bugs.freedesktop.org/show_bug.cgi?id=93860

The tessellation control shader (TCS) currently operates in vec4 mode on all
hardware.  I have a branch that begins implementing a SIMD8 backend, but I
haven't finished it, as I don't think there's much advantage over SIMD4x2 mode.
 However, I believe everything *could* run in SIMD8 mode if we wanted.  I could
probably be talked into finishing it, if you need it.

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