[Bug 110507] [Regression] [Bisected] assert in fragment shader compilation when SIMD32 is enabled
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Fri Sep 6 19:33:12 UTC 2019
https://bugs.freedesktop.org/show_bug.cgi?id=110507
Jason Ekstrand <jason at jlekstrand.net> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|NEW |RESOLVED
--- Comment #10 from Jason Ekstrand <jason at jlekstrand.net> ---
Fixed by the following commit in master:
commit d15fe8ca8262d502435c4f83985ac414f950bc5f
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Sun Sep 1 22:12:07 2019 -0500
Revert "intel/fs: Move the scalar-region conversion to the generator."
This reverts commit c0504569eac5e5c305e9f0c240e248aca9d8891f. Now that
we're doing interpolation lowering in NIR, we can continue to stride the
FS input registers directly in the brw_fs_nir code like we did before.
This fixes SIMD32 fragment shaders which broke because lower_simd_width
depended on the 0 stride to split PLN instructions correctly.
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
I didn't CC stable because nothing currently requires SIMD32 FS there.
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