[Intel-gfx] [ANNOUNCE] xf86-video-intel 2.20.16

Sat Dec 15 11:07:27 CET 2012

Rejoice! We have found a trick to make 830gm/845g stable at long last.
Ever since the switch to GEM and dynamic video memory, those early
second generation chipsets have been plagued by instability. The lack of
flushing cachelines from the CPU to GMCH was eventually solved by using
an undocmented bit, but 830/845 were still hanging under memory pressure.
These deaths were all due to garbage finding its way into the command
streamer, and they go away if we take a leaf out of the original driver
and never reuse those pages for anything else. So for the first time
ever, I have been able to complete running the test suite on an 845g,
even whilst thrashing the page and buffer caches!
-Chris

 * Run the SF stage as single-threaded on gen4 to workaround a few issues
   https://bugs.freedesktop.org/show_bug.cgi?id=57410

 * Keep the scanout SURFACE_STATE separate to avoid overriding its
   memory access control on gen6/7 (i.e. writes to the scanout need to
   be kept out of the render cache)

 * Tune batch flushing after an operation to an exported surface under a
   compositor.

 * Make sure the source is on the CPU for inplace composition of trapezoids
   using the CPU
   https://bugs.freedesktop.org/show_bug.cgi?id=56825

 * Immediately flush in the block hander after a split batch to reduce
   latency between the two halves of an operation.
   https://bugs.freedesktop.org/show_bug.cgi?id=51718

 * Install a fallback config if we fail to install the desired config
   at VT switch (i.e. booting, after resume with 3 incompatible pipes on
   Ivybridge)

 * Pin batches to avoid CS incoherence on 830/845
   https://bugs.freedesktop.org/show_bug.cgi?id=26345

Chris Wilson (53):
      sna: Tidy addition of fake GTF modes for panels
      sna/gen4: Avoid emitting URB_FENCE across a cache-line
      sna/gen4: Remove unused CC viewport
      sna/gen4: Special case solids through the general vertex emitter
      sna/gen4: Workaround render corruption with multiple SF threads
      sna/gen6+: Cache the scanout targets separately to avoid override PTE caching
      sna: Assume that future hardware only gets more flexible
      sna: Don't disable CPU bo if supported on unknown hw
      Refactor the common probe methods for scrn construction
      sna/gen4+: Add common glyph-to-dst emitters
      Fix compilation of UMS probe following 13f47008ec
      Remove the default log message
      sna: Mark proxies as dirty on first relocation
      sna: Only flush at the low apeture watermark if idle
      sna: Only flush before adding fresh surfaces to the batch
      sna: Only inspect the target ring for busyness
      sna: Convert the ring from BLT/3D to the internal index for kgem_ring_is_idle()
      sna: Flush upon change of target if GPU is idle
      sna: Replace remaining kgem_is_idle() with kgem_ring_is_idle()
      sna/gen4+: Refine test for preferring GPU spans
      sna: Move source to CPU prior to referencing for inplace trapezoids
      sna/sprite: Add a DBG to report whether the kernel supports sprites
      sna: Immediately flush a split batch
      sna: Compromise and only flush a split batch if writing to scanout
      sna: Avoid reusing the same 'busy' bit for two different meanings.
      sna: Try installing a fallback config on VT enter in case full desiredMode fails
      sna/dri: Only special case 'divisor && msc-passed' for immediate flipping
      sna/dri: Disable name exchanges for SwapBuffers
      sna/dri: Query current msc before use
      sna/dri: Fix handling of current_msc > target_msc
      sna/gen4: Use the single-threaded SF w/a for spans as well
      sna/gen3+: Use nearest for unscaled videos
      sna/gen2: STIPPLE requires an argument
      sna: Pin some batches to avoid CS incoherence on 830/845
      sna: Fix the error path in kgem_init_pinned_batches() to use the right iter
      sna: Improve the initialisation failure path for pinned batches
      sna: Only flush the batch after an actual relocation
      sna: Fix typo for 830/845 gen
      sna: Fix up BLT overwrite detection to use target_handle
      sna/gen2: Align surface sizes to an even tile
      sna/gen2: Program solid mask using the DIFFUSE component
      sna/gen3: Remove incorrect optimisation of an opaque source for CA
      sna/gen2: Assertions
      sna/gen2: Initialise channel->is_affine for solid
      sna/gen2: Reorder reuse_source() to avoid NULL dereference for solids
      sna/gen3: Remove stray setting of vertex_start
      sna/gen3: Don't combine primitives if beginning a ca 2-pass
      sna/gen2+: Experiment with not forcing migration to GPU after CPU rasterisation
      sna: Reduce fence watermarks
      sna/dri: Store and check size of front/back bo attached to a DRI2 drawable
      sna/dri: Honour TripleBuffer Option
      sna/dri: Fallback to a blit after a failed flip
      2.20.16 release

Jesse Barnes (1):
      dri2: don't schedule a flip prematurely at ScheduleSwap time

git tag: 2.20.16

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.20.16.tar.bz2
MD5:  bff3599b51e44c43c4213cb8d04fa13d  xf86-video-intel-2.20.16.tar.bz2
SHA1: 70f8aba9b0e603276380df6c80a796fa3d7faf8d  xf86-video-intel-2.20.16.tar.bz2
SHA256: 308646d1d4b07e5c581cd7cca133b0e3410a1a3911a58d7d49b8ea106b64d0ba  xf86-video-intel-2.20.16.tar.bz2

http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.20.16.tar.gz
MD5:  87190671c5bdc2606cb9ca99406c660a  xf86-video-intel-2.20.16.tar.gz
SHA1: 1ae6c0ed2a4b586159019b2c321dc1e18ca13d40  xf86-video-intel-2.20.16.tar.gz
SHA256: 5b278c5bbdc27d2aef3e0e87625da83163551052aa7d257525f4919e0c0d91ef  xf86-video-intel-2.20.16.tar.gz

-- 
Chris Wilson, Intel Open Source Technology Centre
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