[Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
daniel at ffwll.ch
Sat Mar 24 15:57:11 CET 2012
On Fri, Mar 23, 2012 at 11:01:31PM +0000, Chris Wilson wrote:
> On Fri, 23 Mar 2012 23:43:36 +0100, Daniel Vetter <daniel.vetter at ffwll.ch> wrote:
> > Again, Valleyview modes these around, so make the mmio base more
> > explicit to consolidate the base address computations to one
> > HAS_PCH_SPLIT check.
> > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Consolidating the offset computation is nice. Everytime I look at this I
> question whether we should be using GMBUS0 or a plain 0 for the actual
> registers. I think GMBUS0 wins for being greppable.
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
I've applied these two to next, thanks for reviewing them.
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx