[Intel-gfx] [PATCH 2/2] drm/i915: add an explict mmio base for gpio/gmbus io
Daniel Vetter
daniel at ffwll.ch
Sun Mar 25 22:37:21 CEST 2012
On Fri, Mar 23, 2012 at 11:43:36PM +0100, Daniel Vetter wrote:
> Again, Valleyview modes these around, so make the mmio base more
> explicit to consolidate the base address computations to one
> HAS_PCH_SPLIT check.
>
> Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +++++
> drivers/gpu/drm/i915/intel_i2c.c | 15 ++++++++-------
> 2 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f2f9dd9..9bd8320 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
...
> @@ -359,6 +355,11 @@ int intel_setup_gmbus(struct drm_device *dev)
> struct drm_i915_private *dev_priv = dev->dev_private;
> int ret, i;
>
> + if (HAS_PCH_SPLIT(dev))
> + dev_priv->gpio_mmio_base = 0;
> + else
> + dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA;
This would work so much better if I hadn't mixed up the PCH_SPLIT case
here ... so much for testing before hitting send. Fixed in d-i-n-q.
-Daniel
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the Intel-gfx
mailing list