[Intel-gfx] [PATCH v3] drm/i915/skl: Read out crtl1 for eDP/DPLL0

Daniel Vetter daniel at ffwll.ch
Fri Nov 21 18:46:40 CET 2014


On Fri, Nov 21, 2014 at 04:14:56PM +0000, Damien Lespiau wrote:
> v2: Put the DPLL0 state readout in skylake_get_ddi_pll(), closer to
> where the PLL assignement read out is done rather than the frequency
> readout function. (Daniel)
> 
> v3: Remove stray new line (Damien)
>     Add Paulo's r-b tag for v1
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com> (v1)
> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>

I still think it might be safer to put DPLL0 into the shared
infrastructure too just because. But this looks good as-is.

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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