[Intel-gfx] [PATCH 08/10] drm: i915: Enable VDSC in Source

[kbuild test robot]

Hi Gaurav,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on next-20180223]
[cannot apply to drm-intel/for-linux-next drm/drm-next v4.16-rc3 v4.16-rc2 v4.16-rc1 v4.16-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Gaurav-K-Singh/Enabling-VDSC-in-i915-driver-for-GLK/20180226-114246
config: x86_64-randconfig-x009-201808 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings

All warnings (new ones prefixed by >>):

   drivers/gpu//drm/i915/intel_vdsc.c: In function 'intel_dsc_enable':
>> drivers/gpu//drm/i915/intel_vdsc.c:1164:3: warning: 'dsc_type2' may be used uninitialized in this function [-Wmaybe-uninitialized]
      configure_dsc_params_for_dsc_controller(encoder, pipe_config,
      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           &dsc_regs, dsc_type2);
           ~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu//drm/i915/intel_vdsc.c:1160:2: warning: 'dsc_type1' may be used uninitialized in this function [-Wmaybe-uninitialized]
     configure_dsc_params_for_dsc_controller(encoder, pipe_config,
     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           &dsc_regs, dsc_type1);
           ~~~~~~~~~~~~~~~~~~~~~

vim +/dsc_type2 +1164 drivers/gpu//drm/i915/intel_vdsc.c

  1103	
  1104	void intel_dsc_enable(struct intel_encoder *encoder,
  1105					struct intel_crtc_state *pipe_config)
  1106	{
  1107		struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
  1108		struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  1109		struct picture_parameters_set pps_params;
  1110		struct intel_dsc_regs dsc_regs;
  1111		struct drm_crtc *crtc = pipe_config->base.crtc;
  1112		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  1113		int pipe = intel_crtc->pipe;
  1114		int dsc_type1;
  1115		int dsc_type2;
  1116		int type = encoder->type;
  1117		unsigned int dss_ctrl1_value = 0;
  1118		unsigned int dss_ctrl2_value = 0;
  1119	
  1120		if ((INTEL_GEN(dev_priv) < 9) ||
  1121					!intel_dp->compr_params.compression_support)
  1122			return;
  1123		/* TO DO: configure DSC params and program source regs */
  1124	
  1125		if (type == INTEL_OUTPUT_EDP) {
  1126			dsc_regs.dss_ctrl1_reg = DSS_CONTROL1;
  1127			dsc_regs.dss_ctrl2_reg = DSS_CONTROL2;
  1128			dsc_regs.dip_ctrl_reg = VIDEO_DIP_CTL_EDP;
  1129			dsc_regs.dip_pps_data_ctrl_reg = VIDEO_DIP_PPS_DATA_EDP_REG;
  1130			dsc_type1 = DSC_A;
  1131			dsc_type2 = DSC_C;
  1132		} else if (type == INTEL_OUTPUT_DP) {
  1133			switch (pipe) {
  1134			case PIPE_A:
  1135				dsc_regs.dss_ctrl1_reg = PIPE_DSS_CTL1_PB;
  1136				dsc_regs.dss_ctrl2_reg = PIPE_DSS_CTL2_PB;
  1137				dsc_regs.dip_ctrl_reg = VIDEO_DIP_CTL_A;
  1138				dsc_regs.dip_pps_data_ctrl_reg =
  1139							VIDEO_DIP_DRM_DATA_TRANSA_REG;
  1140				dsc_type1 = PIPEA_DSC_0;
  1141				dsc_type2 = PIPEA_DSC_1;
  1142				break;
  1143			case PIPE_B:
  1144				dsc_regs.dss_ctrl1_reg = PIPE_DSS_CTL1_PC;
  1145				dsc_regs.dss_ctrl2_reg = PIPE_DSS_CTL2_PC;
  1146				dsc_regs.dip_ctrl_reg = VIDEO_DIP_CTL_B;
  1147				dsc_regs.dip_pps_data_ctrl_reg =
  1148							VIDEO_DIP_DRM_DATA_TRANSB_REG;
  1149				dsc_type1 = PIPEB_DSC_0;
  1150				dsc_type2 = PIPEB_DSC_1;
  1151				break;
  1152			default:
  1153				return;
  1154			}
  1155		} else {
  1156			DRM_ERROR("Func:%s Unsupported port:%d\n", __func__, type);
  1157		}
  1158	
  1159		intel_dsc_regs_init(encoder, &dsc_regs, dsc_type1);
> 1160		configure_dsc_params_for_dsc_controller(encoder, pipe_config,
  1161								&dsc_regs, dsc_type1);
  1162		if (intel_dp->compr_params.dsc_cfg.num_vdsc_instances != 1) {
  1163			intel_dsc_regs_init(encoder, &dsc_regs, dsc_type2);
> 1164			configure_dsc_params_for_dsc_controller(encoder, pipe_config,

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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