[Intel-gfx] [PATCH 08/10] drm: i915: Enable VDSC in Source

kbuild test robot lkp at intel.com
Mon Feb 26 10:51:59 UTC 2018


Hi Gaurav,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on next-20180223]
[cannot apply to drm-intel/for-linux-next drm/drm-next v4.16-rc3 v4.16-rc2 v4.16-rc1 v4.16-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Gaurav-K-Singh/Enabling-VDSC-in-i915-driver-for-GLK/20180226-114246


coccinelle warnings: (new ones prefixed by >>)

>> drivers/gpu/drm/i915/intel_vdsc.c:828:2-3: Unneeded semicolon

vim +828 drivers/gpu/drm/i915/intel_vdsc.c

   771	
   772	void intel_dsc_regs_init(struct intel_encoder *encoder,
   773					struct intel_dsc_regs *dsc_regs, int dsc_type)
   774	{
   775		switch (dsc_type) {
   776		case DSC_A:
   777			dsc_regs->dsc_picture_params0 = DSCA_PICTURE_PARAMETER_SET_0;
   778			dsc_regs->dsc_picture_params1 = DSCA_PICTURE_PARAMETER_SET_1;
   779			dsc_regs->dsc_picture_params2 = DSCA_PICTURE_PARAMETER_SET_2;
   780			dsc_regs->dsc_picture_params3 = DSCA_PICTURE_PARAMETER_SET_3;
   781			dsc_regs->dsc_picture_params4 = DSCA_PICTURE_PARAMETER_SET_4;
   782			dsc_regs->dsc_picture_params5 = DSCA_PICTURE_PARAMETER_SET_5;
   783			dsc_regs->dsc_picture_params6 = DSCA_PICTURE_PARAMETER_SET_6;
   784			dsc_regs->dsc_picture_params7 = DSCA_PICTURE_PARAMETER_SET_7;
   785			dsc_regs->dsc_picture_params8 = DSCA_PICTURE_PARAMETER_SET_8;
   786			dsc_regs->dsc_picture_params9 = DSCA_PICTURE_PARAMETER_SET_9;
   787			dsc_regs->dsc_picture_params10 = DSCA_PICTURE_PARAMETER_SET_10;
   788			dsc_regs->dsc_picture_params16 = DSCA_PICTURE_PARAMETER_SET_16;
   789			dsc_regs->dsc_rc_buff_thresh0_0 = DSCA_RC_BUF_THRESH_0_0;
   790			dsc_regs->dsc_rc_buff_thresh0_1 = DSCA_RC_BUF_THRESH_0_1;
   791			dsc_regs->dsc_rc_buff_thresh1_0 = DSCA_RC_BUF_THRESH_1_0;
   792			dsc_regs->dsc_rc_buff_thresh1_1 = DSCA_RC_BUF_THRESH_1_1;
   793			dsc_regs->dsc_rc_range0_0 = DSCA_RC_RANGE_PARAMETERS_0_0;
   794			dsc_regs->dsc_rc_range0_1 = DSCA_RC_RANGE_PARAMETERS_0_1;
   795			dsc_regs->dsc_rc_range1_0 = DSCA_RC_RANGE_PARAMETERS_1_0;
   796			dsc_regs->dsc_rc_range1_1 = DSCA_RC_RANGE_PARAMETERS_1_1;
   797			dsc_regs->dsc_rc_range2_0 = DSCA_RC_RANGE_PARAMETERS_2_0;
   798			dsc_regs->dsc_rc_range2_1 = DSCA_RC_RANGE_PARAMETERS_2_1;
   799			dsc_regs->dsc_rc_range3_0 = DSCA_RC_RANGE_PARAMETERS_3_0;
   800			dsc_regs->dsc_rc_range3_1 = DSCA_RC_RANGE_PARAMETERS_3_1;
   801			break;
   802		case DSC_C:
   803			dsc_regs->dsc_picture_params0 = DSCC_PICTURE_PARAMETER_SET_0;
   804			dsc_regs->dsc_picture_params1 = DSCC_PICTURE_PARAMETER_SET_1;
   805			dsc_regs->dsc_picture_params2 = DSCC_PICTURE_PARAMETER_SET_2;
   806			dsc_regs->dsc_picture_params3 = DSCC_PICTURE_PARAMETER_SET_3;
   807			dsc_regs->dsc_picture_params4 = DSCC_PICTURE_PARAMETER_SET_4;
   808			dsc_regs->dsc_picture_params5 = DSCC_PICTURE_PARAMETER_SET_5;
   809			dsc_regs->dsc_picture_params6 = DSCC_PICTURE_PARAMETER_SET_6;
   810			dsc_regs->dsc_picture_params7 = DSCC_PICTURE_PARAMETER_SET_7;
   811			dsc_regs->dsc_picture_params8 = DSCC_PICTURE_PARAMETER_SET_8;
   812			dsc_regs->dsc_picture_params9 = DSCC_PICTURE_PARAMETER_SET_9;
   813			dsc_regs->dsc_picture_params10 = DSCC_PICTURE_PARAMETER_SET_10;
   814			dsc_regs->dsc_picture_params16 = DSCC_PICTURE_PARAMETER_SET_16;
   815			dsc_regs->dsc_rc_buff_thresh0_0 = DSCC_RC_BUF_THRESH_0_0;
   816			dsc_regs->dsc_rc_buff_thresh0_1 = DSCC_RC_BUF_THRESH_0_1;
   817			dsc_regs->dsc_rc_buff_thresh1_0 = DSCC_RC_BUF_THRESH_1_0;
   818			dsc_regs->dsc_rc_buff_thresh1_1 = DSCC_RC_BUF_THRESH_1_1;
   819			dsc_regs->dsc_rc_range0_0 = DSCC_RC_RANGE_PARAMETERS_0_0;
   820			dsc_regs->dsc_rc_range0_1 = DSCC_RC_RANGE_PARAMETERS_0_1;
   821			dsc_regs->dsc_rc_range1_0 = DSCC_RC_RANGE_PARAMETERS_1_0;
   822			dsc_regs->dsc_rc_range1_1 = DSCC_RC_RANGE_PARAMETERS_1_1;
   823			dsc_regs->dsc_rc_range2_0 = DSCC_RC_RANGE_PARAMETERS_2_0;
   824			dsc_regs->dsc_rc_range2_1 = DSCC_RC_RANGE_PARAMETERS_2_1;
   825			dsc_regs->dsc_rc_range3_0 = DSCC_RC_RANGE_PARAMETERS_3_0;
   826			dsc_regs->dsc_rc_range3_1 = DSCC_RC_RANGE_PARAMETERS_3_1;
   827			break;
 > 828		};
   829	}
   830	

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