[Intel-gfx] [PATCH v3] drm/i915/psr: Update PSR2 resolution check for Cannonlake

[Ville Syrjälä]

On Tue, Mar 06, 2018 at 12:33:55PM -0800, Dhinakaran Pandiyan wrote:
> In fact, apply the Cannonlake resolution check for all >= Gen-10 platforms
> to be safe.
> 
> v3: Update GLK too. (Ville)
>     Longer variable names.
>     if-else in place of ternary operator.
> v2: Use local variables for resolution limits and print them (Ville)
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Elio Martinez Monroy <elio.martinez.monroy at intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 21 +++++++++++++++------
>  1 file changed, 15 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 05770790a4e9..23175c5c4a50 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -451,8 +451,9 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  {
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> -	const struct drm_display_mode *adjusted_mode =
> -		&crtc_state->base.adjusted_mode;
> +	int crtc_hdisplay = crtc_state->base.adjusted_mode.crtc_hdisplay;
> +	int crtc_vdisplay = crtc_state->base.adjusted_mode.crtc_vdisplay;
            ^^^^^
The crtc_ prefix is pretty much redundant.

> +	int psr_max_h = 0, psr_max_v = 0;

And this still reads as "max height" to my brain, but meh.

>  
>  	/*
>  	 * FIXME psr2_support is messed up. It's both computed
> @@ -462,10 +463,18 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  	if (!dev_priv->psr.psr2_support)
>  		return false;
>  
> -	/* PSR2 is restricted to work with panel resolutions up to 3640x2304 */
> -	if (adjusted_mode->crtc_hdisplay > 3640 ||
> -	    adjusted_mode->crtc_vdisplay > 2304) {
> -		DRM_DEBUG_KMS("PSR2 not enabled, panel resolution too big\n");
> +	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
> +		psr_max_h = 4096;
> +		psr_max_v = 2304;
> +	} else if (IS_GEN9(dev_priv)) {
> +		psr_max_h = 3640;
> +		psr_max_v = 2304;
> +	}

pre-SKL?

> +
> +	if (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v) {
> +		DRM_DEBUG_KMS("PSR2 not enabled, resolution %dx%d > max supported %dx%d\n",
> +			      crtc_hdisplay, crtc_vdisplay,
> +			      psr_max_h, psr_max_v);
>  		return false;
>  	}
>  
> -- 
> 2.14.1

-- 
Ville Syrjälä
Intel OTC