[Intel-gfx] [PATCH v5 05/11] drm/i915/dsb: Check DSB engine status.

[Animesh Manna]

On 9/9/2019 6:43 PM, Sharma, Shashank wrote:
>
> On 9/7/2019 4:37 PM, Animesh Manna wrote:
>> As per bspec check for DSB status before programming any
>> of its register. Inline function added to check the dsb status.
>>
>> Cc: Michel Thierry <michel.thierry at intel.com>
>> Cc: Jani Nikula <jani.nikula at intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
>> Cc: Shashank Sharma <shashank.sharma at intel.com>
>> Signed-off-by: Animesh Manna <animesh.manna at intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dsb.c | 9 +++++++++
>>   drivers/gpu/drm/i915/i915_reg.h          | 7 +++++++
>>   2 files changed, 16 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
>> b/drivers/gpu/drm/i915/display/intel_dsb.c
>> index 0f55ed683d41..2c8415518c65 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
>> @@ -17,6 +17,15 @@
>>   #define DSB_BYTE_EN_SHIFT        20
>>   #define DSB_REG_VALUE_MASK        0xfffff
>>   +static inline bool is_dsb_busy(struct intel_dsb *dsb)
>> +{
>> +    struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
>> +    struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> +    enum pipe pipe = crtc->pipe;
>> +
>> +    return DSB_STATUS & I915_READ(DSB_CTRL(pipe, dsb->id));
>> +}
>> +
>>   struct intel_dsb *
>>   intel_dsb_get(struct intel_crtc *crtc)
>>   {
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h 
>> b/drivers/gpu/drm/i915/i915_reg.h
>> index 006cffd56be2..a3099f712ae6 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -11676,4 +11676,11 @@ enum skl_power_gate {
>>   #define PORT_TX_DFLEXDPCSSS(fia)        _MMIO_FIA((fia), 0x00894)
>>   #define   DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)        (1 << (tc_port))
>>   +/* This register controls the Display State Buffer (DSB) engines. */
>> +#define _DSBSL_INSTANCE_BASE        0x70B00
>> +#define DSBSL_INSTANCE(pipe, id)    (_DSBSL_INSTANCE_BASE + \
>> +                     (pipe) * 0x1000 + (id) * 100)
>
> Why is pipe in () ?

mmio offset per DSB depend on pipe and dsb-id (3 DSB per pipe.)
offset of PIPE_A DSB1-> 70B00
offset of PIPE_B DSB1-> 71B00 and so on...

Regards,
Animesh