[Intel-gfx] [PATCH 3/3] drm/i915/perf: Add the report format with a non-power-of-2 size

Lionel Landwerlin lionel.g.landwerlin at intel.com
Sun Sep 15 11:27:58 UTC 2019


On 14/09/2019 02:06, Umesh Nerlige Ramappa wrote:
> Add the report format with size that is not a power of 2. This allows
> use of all report formats defined in hardware.
>
> Move the format definition to end to avoid breaking API (Lionel)
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>


I think that like any change to the uAPI should be versioned so an 
application can know what's available without trying to open the stream 
to test whether a given parameter is available.

I would pull the patch in the link before this one : 
https://patchwork.freedesktop.org/patch/329723/?series=66418&rev=1

And bump the version number to 2 in this patch.


Cheers,


-Lionel


> ---
>   drivers/gpu/drm/i915/i915_perf.c |  2 +-
>   include/uapi/drm/i915_drm.h      | 11 ++++++-----
>   2 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 482fca3da7de..781fc5892493 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -312,11 +312,11 @@ static const struct i915_oa_format hsw_oa_formats[I915_OA_FORMAT_MAX] = {
>   	[I915_OA_FORMAT_A13]	    = { 0, 64 },
>   	[I915_OA_FORMAT_A29]	    = { 1, 128 },
>   	[I915_OA_FORMAT_A13_B8_C8]  = { 2, 128 },
> -	/* A29_B8_C8 Disallowed as 192 bytes doesn't factor into buffer size */
>   	[I915_OA_FORMAT_B4_C8]	    = { 4, 64 },
>   	[I915_OA_FORMAT_A45_B8_C8]  = { 5, 256 },
>   	[I915_OA_FORMAT_B4_C8_A16]  = { 6, 128 },
>   	[I915_OA_FORMAT_C4_B8]	    = { 7, 64 },
> +	[I915_OA_FORMAT_A29_B8_C8]  = { 3, 192 },
>   };
>   
>   static const struct i915_oa_format gen8_plus_oa_formats[I915_OA_FORMAT_MAX] = {
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 469dc512cca3..4e2d4e492b06 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -1829,12 +1829,13 @@ enum drm_i915_oa_format {
>   	I915_OA_FORMAT_B4_C8,	    /* HSW only */
>   	I915_OA_FORMAT_A45_B8_C8,   /* HSW only */
>   	I915_OA_FORMAT_B4_C8_A16,   /* HSW only */
> -	I915_OA_FORMAT_C4_B8,	    /* HSW+ */
> +	I915_OA_FORMAT_C4_B8,	    /* HSW only */
>   
> -	/* Gen8+ */
> -	I915_OA_FORMAT_A12,
> -	I915_OA_FORMAT_A12_B8_C8,
> -	I915_OA_FORMAT_A32u40_A4u32_B8_C8,
> +	I915_OA_FORMAT_A12,			/* Gen8+ */
> +	I915_OA_FORMAT_A12_B8_C8,		/* Gen8+ */
> +	I915_OA_FORMAT_A32u40_A4u32_B8_C8,	/* Gen8+ */
> +
> +	I915_OA_FORMAT_A29_B8_C8,   /* HSW only */
>   
>   	I915_OA_FORMAT_MAX	    /* non-ABI */
>   };




More information about the Intel-gfx mailing list