[Intel-gfx] [PATCH] drm/i915: Allow set context SSEU on platforms after gen 11
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Thu Sep 19 07:00:54 UTC 2019
On 18/09/2019 18:31, Stuart Summers wrote:
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110559
Unless there was some discussion I missed we can't just turn it on to
work around a SKIP in IGT. Feature was deliberately limited to Icelake
and even there just to a sub-set of possible configurations.
Regards,
Tvrtko
> Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> Signed-off-by: Stuart Summers <stuart.summers at intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index f1c0e5d958f3..39af4c81b29a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1310,7 +1310,7 @@ static int set_sseu(struct i915_gem_context *ctx,
> if (args->size < sizeof(user_sseu))
> return -EINVAL;
>
> - if (!IS_GEN(i915, 11))
> + if (INTEL_GEN(i915) < 11)
> return -ENODEV;
>
> if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
>
More information about the Intel-gfx
mailing list