[PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes

[Simon Richter]

Hi,

On 7/28/25 22:30, Rodrigo Vivi wrote:

>> -	drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
>> +	drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);

> but this is strange.
> think that we could get rid of the aligned_size variable and only go with
> size = ALIGN(size, PAGE_SIZE)

I'm going through this code, and it is more horrible than anticipated.

The problematic path that makes smaller allocations comes from 
xe_pt_create, where a 4k BO is created for a page table. This needs to 
be CPU visible as well, so in theory it needs to be 16/64/256k aligned, 
depending on PAGE_SIZE. Extending it is wasteful, but that's what we do 
here.

Using the original size makes the mappings fail, because later it wants 
to map SZ_4K >> PAGE_SHIFT (== 0) pages.

I wonder if there should be a way to merge smaller allocations, maybe 
even special-case page table BOs here (userspace merges smaller 
allocations itself, so it should never request less than PAGE_SIZE).

I've talked[1] to the Mesa people, and because they have their own 
allocator, it should be okay to define the 
DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT parameter as "minimum alignment that 
is okay for any userspace BO type" (as opposed to "minimum alignment for 
VRAM BOs", which would require Mesa to also align to 
sysconf(_SC_PAGESIZE) for CPU visible BOs).

For some reason, everyone tries to avoid setting flags to clarify what 
they want. Mesa does not set the flag for "this BO needs to be CPU 
visible" if there is no VRAM that doesn't fit in the aperture, so the 
kernel can't enforce alignment if the CPU has stricter requirements than 
the GPU. The kernel would ignore the flag anyway, but that's not the point.

    Simon

[1] https://gitlab.freedesktop.org/mesa/mesa/-/issues/13658
-------------- next part --------------
A non-text attachment was scrubbed...
Name: OpenPGP_signature.asc
Type: application/pgp-signature
Size: 488 bytes
Desc: OpenPGP digital signature
URL: <https://lists.freedesktop.org/archives/intel-xe/attachments/20250809/6c402c09/attachment.sig>