[Mesa-dev] is_tex bit for TGSI sampling instructions

[Dave Airlie]

On Wed, Aug 24, 2011 at 1:26 PM, Michal Krol <michal at vmware.com> wrote:
> ----- Original Message -----
>> Any reasons
>>
>>    { 1, 2, 0, 0, 0, 0, "LOAD",        TGSI_OPCODE_LOAD },
>>    { 1, 2, 0, 0, 0, 0, "LOAD_MS",     TGSI_OPCODE_LOAD_MS },
>>    { 1, 3, 0, 0, 0, 0, "SAMPLE",      TGSI_OPCODE_SAMPLE },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_B",    TGSI_OPCODE_SAMPLE_B },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_C",    TGSI_OPCODE_SAMPLE_C },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_C_LZ", TGSI_OPCODE_SAMPLE_C_LZ },
>>    { 1, 5, 0, 0, 0, 0, "SAMPLE_D",    TGSI_OPCODE_SAMPLE_D },
>>    { 1, 3, 0, 0, 0, 0, "SAMPLE_L",    TGSI_OPCODE_SAMPLE_L },
>>    { 1, 3, 0, 0, 0, 0, "GATHER4",     TGSI_OPCODE_GATHER4 },
>>    { 1, 2, 0, 0, 0, 0, "RESINFO",     TGSI_OPCODE_RESINFO },
>>    { 1, 2, 0, 0, 0, 0, "SAMPLE_POS",  TGSI_OPCODE_SAMPLE_POS },
>>    { 1, 2, 0, 0, 0, 0, "SAMPLE_INFO", TGSI_OPCODE_SAMPLE_INFO },
>>
>> these don't have the is_tex bit set?
>>
>
> This bit marks legacy texture sample instructions that have texture target encoded directly into the instruction token. In contrast, the instructions above take an extra argument of type RESOURCE, for which the texture target is encoded in register declaration.

Thanks MIchal,

looks like the glsl->tgsi convertor needs to take this into a/c.

Dave.