[Mesa-dev] is_tex bit for TGSI sampling instructions

Bryan Cain bryancain3 at gmail.com
Wed Aug 24 19:14:48 PDT 2011


On 08/24/2011 07:26 AM, Michal Krol wrote:
> ----- Original Message -----
>> Any reasons
>>
>>    { 1, 2, 0, 0, 0, 0, "LOAD",        TGSI_OPCODE_LOAD },
>>    { 1, 2, 0, 0, 0, 0, "LOAD_MS",     TGSI_OPCODE_LOAD_MS },
>>    { 1, 3, 0, 0, 0, 0, "SAMPLE",      TGSI_OPCODE_SAMPLE },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_B",    TGSI_OPCODE_SAMPLE_B },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_C",    TGSI_OPCODE_SAMPLE_C },
>>    { 1, 4, 0, 0, 0, 0, "SAMPLE_C_LZ", TGSI_OPCODE_SAMPLE_C_LZ },
>>    { 1, 5, 0, 0, 0, 0, "SAMPLE_D",    TGSI_OPCODE_SAMPLE_D },
>>    { 1, 3, 0, 0, 0, 0, "SAMPLE_L",    TGSI_OPCODE_SAMPLE_L },
>>    { 1, 3, 0, 0, 0, 0, "GATHER4",     TGSI_OPCODE_GATHER4 },
>>    { 1, 2, 0, 0, 0, 0, "RESINFO",     TGSI_OPCODE_RESINFO },
>>    { 1, 2, 0, 0, 0, 0, "SAMPLE_POS",  TGSI_OPCODE_SAMPLE_POS },
>>    { 1, 2, 0, 0, 0, 0, "SAMPLE_INFO", TGSI_OPCODE_SAMPLE_INFO },
>>
>> these don't have the is_tex bit set?
>>
> This bit marks legacy texture sample instructions that have texture target encoded directly into the instruction token. In contrast, the instructions above take an extra argument of type RESOURCE, for which the texture target is encoded in register declaration.

Like Dave said, the GLSL->TGSI translator needs to account for this. 
I'm not sure on how to initialize a resource in TGSI, though.  Is there
a state tracker that uses it that could provide an example?

I also have an unrelated TGSI question: has it been determined exactly
what the source regs for TXF should be and what order they should be in?

Bryan


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