[Mesa-dev] [PATCH 13/14] i965/gen8: Add HiZ auxiliary buffer support
Jordan Justen
jordan.l.justen at intel.com
Tue Jul 15 18:32:21 PDT 2014
From: Kenneth Graunke <kenneth at whitecape.org>
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
[jordan.l.justen at intel.com: convert from aux_mt to aux_buf]
Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 4818fca..45ff904 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -158,6 +158,9 @@ gen8_update_texture_surface(struct gl_context *ctx,
if (mt->mcs_buf) {
aux_buf = mt->mcs_buf;
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
+ } else if (intel_miptree_sample_with_hiz(brw, mt)) {
+ aux_buf = mt->hiz_buf;
+ aux_mode = GEN8_SURFACE_AUX_MODE_HIZ;
}
/* If this is a view with restricted NumLayers, then our effective depth
@@ -239,7 +242,7 @@ gen8_update_texture_surface(struct gl_context *ctx,
surf[10] = 0;
surf[11] = 0;
}
- surf[12] = 0;
+ surf[12] = (aux_mode == GEN8_SURFACE_AUX_MODE_HIZ) ? mt->depth_clear_value : 0;
/* Emit relocation to surface contents */
drm_intel_bo_emit_reloc(brw->batch.bo,
--
2.0.0
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