[Mesa-dev] [PATCH 10/10] radeonsi: implement polygon stippling
Marek Olšák
maraeo at gmail.com
Tue Feb 3 05:43:46 PST 2015
On Mon, Feb 2, 2015 at 10:05 AM, Michel Dänzer <michel at daenzer.net> wrote:
> On 02.02.2015 02:37, Marek Olšák wrote:
>> From: Marek Olšák <marek.olsak at amd.com>
>>
>> The stipple texture is bound to slot 16, so there are 17 sampler states and
>> 34 sampler views now (17 normal slots + 17 fmask slots).
>
> [...]
>
>> @@ -2742,16 +2743,26 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
>> int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
>> {
>> struct si_shader_selector *sel = shader->selector;
>> + struct tgsi_token *tokens = sel->tokens;
>> struct si_shader_context si_shader_ctx;
>> struct lp_build_tgsi_context * bld_base;
>> + struct tgsi_shader_info stipple_shader_info;
>> LLVMModuleRef mod;
>> int r = 0;
>> + bool poly_stipple = sel->type == PIPE_SHADER_FRAGMENT &&
>> + shader->key.ps.poly_stipple;
>> bool dump = r600_can_dump_shader(&sscreen->b, sel->tokens);
>>
>> + if (poly_stipple) {
>> + tokens = util_pstipple_create_fragment_shader(tokens, NULL,
>> + SI_POLY_STIPPLE_SAMPLER);
>> + tgsi_scan_shader(tokens, &stipple_shader_info);
>> + }
>
> The indentation of the closing curly brace is wrong.
Updated patches are attached. The indentation looked wrong because
there were spaces instead of tabs.
>
>
>> @@ -109,14 +110,16 @@ union si_state {
>> struct si_pm4_state *array[0];
>> };
>>
>> -#define SI_NUM_USER_SAMPLERS 16 /* AKA OpenGL textures units per shader */
>> +#define SI_NUM_USER_SAMPLERS 16 /* AKA OpenGL textures units per shader */
>
> SI_NUM_USER_SAMPLERS could be bumped in or after patch 8, right?
Did you mean SI_NUM_SAMPLES? I split that into a separate patch.
SI_NUM_USER_SAMPLERS could be bumped, but I don't see a point yet.
Note that the limit is 31 due to the stipple texture and FMASK
consuming the other half of the slots.
Marek
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