[Mesa-dev] [PATCH 1/3] i965: Fix HW blitter pitch limits
chris at chris-wilson.co.uk
Fri Jun 5 11:41:46 PDT 2015
On Fri, Jun 05, 2015 at 11:26:29AM -0700, Ben Widawsky wrote:
> On Fri, Jun 05, 2015 at 03:14:29PM +0100, Chris Wilson wrote:
> > The BLT pitch is specified in bytes for linear surfaces and in dwords
> > for tiled surfaces. In both cases the programmable limit is 32,767, so
> > adjust the check to compensate for the effect of tiling.
> FYI: Here is a patch series I never landed which touches some of the same code
> for similar purposes.
Different purpose ;-)
This was just a drive by fix, which don't appear in that series.
Note that you can reduce both the x/y coordinates here and for use by
the 3D pipeline - which given that narrower coordinate range but ability
to operate on larger surfaces than the BLT is even more advantageous
(unless you force surfaces to linear if they are too big, how quaint).
Chris Wilson, Intel Open Source Technology Centre
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