[Mesa-dev] [PATCH 1/3] i965: Fix HW blitter pitch limits

Ben Widawsky ben at bwidawsk.net
Fri Jun 5 11:26:29 PDT 2015

On Fri, Jun 05, 2015 at 03:14:29PM +0100, Chris Wilson wrote:
> The BLT pitch is specified in bytes for linear surfaces and in dwords
> for tiled surfaces. In both cases the programmable limit is 32,767, so
> adjust the check to compensate for the effect of tiling.

FYI: Here is a patch series I never landed which touches some of the same code
for similar purposes.


Ben Widawsky, Intel Open Source Technology Center

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