[Mesa-dev] [PATCH 2/2] i965: Add and fix comments in brw_vue_map.c.
Kenneth Graunke
kenneth at whitecape.org
Wed Jun 17 22:36:05 PDT 2015
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/brw_vue_map.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vue_map.c b/src/mesa/drivers/dri/i965/brw_vue_map.c
index ff92bd2..7687578 100644
--- a/src/mesa/drivers/dri/i965/brw_vue_map.c
+++ b/src/mesa/drivers/dri/i965/brw_vue_map.c
@@ -24,6 +24,15 @@
/**
* @file brw_vue_map.c
*
+ * This file computes the "VUE map" for a (non-fragment) shader stage, which
+ * describes the layout of its output varyings. The VUE map is used to match
+ * outputs from one stage with the inputs of the next.
+ *
+ * Largely, varyings can be placed however we like - producers/consumers simply
+ * have to agree on the layout. However, there is also a "VUE Header" that
+ * prescribes a fixed-layout for items that interact with fixed function
+ * hardware, such as the clipper and rasterizer.
+ *
* Authors:
* Paul Berry <stereotype441 at gmail.com>
* Chris Forbes <chrisf at ijw.co.nz>
@@ -45,7 +54,7 @@ assign_vue_slot(struct brw_vue_map *vue_map, int varying)
}
/**
- * Compute the VUE map for vertex shader program.
+ * Compute the VUE map for a shader stage.
*/
void
brw_compute_vue_map(const struct brw_device_info *devinfo,
@@ -76,6 +85,9 @@ brw_compute_vue_map(const struct brw_device_info *devinfo,
/* VUE header: format depends on chip generation and whether clipping is
* enabled.
+ *
+ * See the Sandybridge PRM, Volume 2 Part 1, section 1.5.1 (page 30),
+ * "Vertex URB Entry (VUE) Formats" which describes the VUE header layout.
*/
if (devinfo->gen < 6) {
/* There are 8 dwords in VUE header pre-Ironlake:
--
2.4.3
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