[Mesa-dev] [PATCH] radeonsi: fix discard-only fragment shaders (v2)

Marek Olšák maraeo at gmail.com
Fri Jan 22 02:38:12 PST 2016


Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Thu, Jan 21, 2016 at 4:06 AM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> When a fragment shader is used that has no outputs but does conditional
> discard (KILL_IF), all fragments are killed without this patch.
>
> By comparing various register settings, my conclusion is that the exec mask
> is either not properly forwarded to the DB by NULL exports or ends up being
> unused, at least when there is _only_ a NULL export (the ISA documentation
> claims that NULL exports can be used to override a previously exported exec
> mask).
>
> Of the various approaches I have tried to work around the problem, this one
> seems to be the least invasive one.
>
> v2: take discard by alpha test into account as well
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93761
> ---
>  src/gallium/drivers/radeonsi/si_state_shaders.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
> index 8ff70b4..807c9e2 100644
> --- a/src/gallium/drivers/radeonsi/si_state_shaders.c
> +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
> @@ -393,6 +393,7 @@ static void si_shader_ps(struct si_shader *shader)
>         unsigned spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1);
>         uint64_t va;
>         bool has_centroid;
> +       bool writes_execmask;
>
>         pm4 = shader->pm4 = CALLOC_STRUCT(si_pm4_state);
>
> @@ -452,10 +453,13 @@ static void si_shader_ps(struct si_shader *shader)
>         si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
>         si_pm4_set_reg(pm4, R_0286D8_SPI_PS_IN_CONTROL, spi_ps_in_control);
>
> +       writes_execmask = info->uses_kill ||
> +                         shader->key.ps.alpha_func != PIPE_FUNC_ALWAYS;
>         si_pm4_set_reg(pm4, R_028710_SPI_SHADER_Z_FORMAT,
>                        info->writes_samplemask ? V_028710_SPI_SHADER_32_ABGR :
>                        info->writes_stencil ? V_028710_SPI_SHADER_32_GR :
>                        info->writes_z ? V_028710_SPI_SHADER_32_R :
> +                      (writes_execmask && !info->num_outputs) ? V_028710_SPI_SHADER_32_R :
>                        V_028710_SPI_SHADER_ZERO);
>
>         si_pm4_set_reg(pm4, R_028714_SPI_SHADER_COL_FORMAT, spi_shader_col_format);
> --
> 2.5.0
>
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