[Mesa-dev] [RFC 0/3] Support GPUs with less then 32 vertex buffers

[Christian Gmeiner]

To be able to upstream etnaviv mesa driver it is needed to get all
gallium changes reviewed (and upstreamed) first. And I will start
with the vertex buffer topic.

The current u_vbuf source assumes that every GPU supports 32
vertext buffers. Vivante GPUs do support a different number of
vertext buffers based on the model.

- GC600:  1
- GC1000: 4
- GC2000: 8

The patches are written by Wladimir about 3 years ago and I did a rebase
and some code cosmectics only.

Christian Gmeiner (1):
  gallium: add PIPE_CAP_MAX_VERTEX_BUFFERS

Wladimir J. van der Laan (2):
  u_vbuf: add logic to use a limited number of vbufs
  u_vbuf: use single vertex buffer if needed

 src/gallium/auxiliary/util/u_vbuf.c              | 73 ++++++++++++++++++++----
 src/gallium/auxiliary/util/u_vbuf.h              |  3 +
 src/gallium/docs/source/screen.rst               |  1 +
 src/gallium/drivers/freedreno/freedreno_screen.c |  2 +
 src/gallium/drivers/i915/i915_screen.c           |  2 +
 src/gallium/drivers/ilo/ilo_screen.c             |  2 +
 src/gallium/drivers/llvmpipe/lp_screen.c         |  2 +
 src/gallium/drivers/nouveau/nv30/nv30_screen.c   |  2 +
 src/gallium/drivers/nouveau/nv50/nv50_screen.c   |  2 +
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c   |  2 +
 src/gallium/drivers/r300/r300_screen.c           |  2 +
 src/gallium/drivers/r600/r600_pipe.c             |  2 +
 src/gallium/drivers/radeonsi/si_pipe.c           |  2 +
 src/gallium/drivers/softpipe/sp_screen.c         |  2 +
 src/gallium/drivers/svga/svga_screen.c           |  2 +
 src/gallium/drivers/swr/swr_screen.cpp           |  2 +
 src/gallium/drivers/vc4/vc4_screen.c             |  2 +
 src/gallium/drivers/virgl/virgl_screen.c         |  2 +
 src/gallium/include/pipe/p_defines.h             |  1 +
 19 files changed, 97 insertions(+), 11 deletions(-)

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2.5.5