[Mesa-dev] [PATCH 02/64] i965/blorp/gen8: Use the correct max level and layer in emit_surface_states
Pohjolainen, Topi
topi.pohjolainen at intel.com
Wed Jun 22 04:30:44 UTC 2016
On Sat, Jun 11, 2016 at 09:02:17AM -0700, Jason Ekstrand wrote:
> We were adding in the base which is wrong because the values given in the
> miptree are relative to zero and not the base layer/level.
Thanks for fixing my mistake!
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
>
> Cc: "11.1 11.2 12.0" <mesa-stable at lists.freedesktop.org>
> ---
> src/mesa/drivers/dri/i965/gen8_blorp.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c
> index a9a400d..fcf5a53 100644
> --- a/src/mesa/drivers/dri/i965/gen8_blorp.c
> +++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
> @@ -627,13 +627,12 @@ gen8_blorp_emit_surface_states(struct brw_context *brw,
> mt->target == GL_TEXTURE_CUBE_MAP;
> const unsigned depth = (is_cube ? 6 : 1) * mt->logical_depth0;
> const GLenum target = is_cube ? GL_TEXTURE_2D_ARRAY : mt->target;
> - const unsigned max_level = surface->level + mt->last_level + 1;
> const unsigned layer = mt->target != GL_TEXTURE_3D ?
> surface->layer / layer_divider : 0;
>
> brw->vtbl.emit_texture_surface_state(brw, mt, target,
> - layer, layer + depth,
> - surface->level, max_level,
> + layer, depth,
> + surface->level, mt->last_level + 1,
> surface->brw_surfaceformat,
> surface->swizzle,
> &wm_surf_offset_texture,
> --
> 2.5.0.400.gff86faf
>
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