[Mesa-dev] [PATCH 16/18] i965/blorp: Fix the size requirement for vertex elements

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.h  |  3 ++-
 src/mesa/drivers/dri/i965/gen7_blorp.c | 38 ++++++++++++++++++++++------------
 src/mesa/drivers/dri/i965/gen8_blorp.c |  2 +-
 3 files changed, 28 insertions(+), 15 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index d3fc713..f61fc52 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -457,7 +457,8 @@ gen6_blorp_emit_sampler_state(struct brw_context *brw,
                               unsigned tex_filter, unsigned max_lod,
                               bool non_normalized_coords);
 void
-gen7_blorp_emit_urb_config(struct brw_context *brw);
+gen7_blorp_emit_urb_config(struct brw_context *brw,
+                           const struct brw_blorp_params *params);
 
 void
 gen7_blorp_emit_blend_state_pointer(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c
index 5384153..c40192a 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -31,16 +31,26 @@
 
 #include "brw_blorp.h"
 
-static bool
-gen7_blorp_skip_urb_config(const struct brw_context *brw)
+/* Once vertex fetcher has written full VUE entries with complete
+ * header the space requirement is as follows per vertex (in bytes):
+ *
+ *     Header    Position    Program constants
+ *   +--------+------------+-------------------+
+ *   |   16   |     16     |      n x 16       |
+ *   +--------+------------+-------------------+
+ *
+ * where 'n' stands for number of varying inputs expressed as vec4s.
+ *
+ * The URB size is in turn expressed in 64 bytes (512 bits).
+ */
+static unsigned
+gen7_blorp_get_vs_entry_size(const struct brw_blorp_params *params)
 {
-   if (brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE))
-      return false;
+    const unsigned num_varyings =
+       params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+    const unsigned total_needed = 16 + 16 + num_varyings * 16;
 
-   /* Vertex buffer takes 24 bytes. As the size is expressed in 64 bytes,
-    * one will suffice, otherwise the setup can be any valid configuration.
-    */
-   return brw->urb.vsize > 0;
+   return DIV_ROUND_UP(total_needed, 64);
 }
 
 /* 3DSTATE_URB_VS
@@ -56,13 +66,15 @@ gen7_blorp_skip_urb_config(const struct brw_context *brw)
  *     valid.
  */
 void
-gen7_blorp_emit_urb_config(struct brw_context *brw)
+gen7_blorp_emit_urb_config(struct brw_context *brw,
+                           const struct brw_blorp_params *params)
 {
    const unsigned urb_size =
       (brw->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16;
-   const unsigned vs_size = 1;
+   const unsigned vs_entry_size = gen7_blorp_get_vs_entry_size(params);
 
-   if (gen7_blorp_skip_urb_config(brw))
+   if (!(brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) &&
+       brw->urb.vsize >= vs_entry_size)
       return;
 
    brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE;
@@ -74,7 +86,7 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
                                  0 /* gs_size */,
                                  urb_size / 2 /* fs_size */);
 
-   gen7_upload_urb(brw, vs_size, false, false);
+   gen7_upload_urb(brw, vs_entry_size, false, false);
 }
 
 
@@ -790,7 +802,7 @@ gen7_blorp_exec(struct brw_context *brw,
                                  params->dst.num_samples > 1 ?
                                  (1 << params->dst.num_samples) - 1 : 1);
    gen6_blorp_emit_vertices(brw, params);
-   gen7_blorp_emit_urb_config(brw);
+   gen7_blorp_emit_urb_config(brw, params);
    if (params->wm_prog_data) {
       cc_blend_state_offset = gen6_blorp_emit_blend_state(brw, params);
       cc_state_offset = gen6_blorp_emit_cc_state(brw);
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c
index a3216f5..5d10a91 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -678,7 +678,7 @@ gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
    gen7_blorp_emit_cc_viewport(brw);
    gen7_l3_state.emit(brw);
 
-   gen7_blorp_emit_urb_config(brw);
+   gen7_blorp_emit_urb_config(brw, params);
 
    const uint32_t cc_blend_state_offset =
       gen8_blorp_emit_blend_state(brw, params);
-- 
2.5.5