[Mesa-dev] [PATCH 21/36] i965/blorp: Get rid of brw_blorp_surface_info::width/height

Jason Ekstrand jason at jlekstrand.net
Thu Jun 30 00:37:40 UTC 2016


Instead, we manually mutate the surface size as needed.
---
 src/mesa/drivers/dri/i965/brw_blorp.c        | 21 ++++++---------------
 src/mesa/drivers/dri/i965/brw_blorp.h        | 12 ------------
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 +++++++++++++++----
 src/mesa/drivers/dri/i965/gen6_blorp.c       |  4 ++--
 src/mesa/drivers/dri/i965/gen7_blorp.c       |  4 ++--
 5 files changed, 25 insertions(+), 35 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 728e24d1..188f708 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -205,8 +205,6 @@ brw_blorp_surface_info_init(struct brw_context *brw,
 
    info->level = level;
    info->layer = layer;
-   info->width = minify(mt->physical_width0, level - mt->first_level);
-   info->height = minify(mt->physical_height0, level - mt->first_level);
 
    if (format == MESA_FORMAT_NONE)
       format = mt->format;
@@ -384,10 +382,6 @@ brw_blorp_emit_surface_state(struct brw_context *brw,
 
    struct isl_surf surf = surface->surf;
 
-   /* Stomp surface dimensions and tiling (if needed) with info from blorp */
-   surf.logical_level0_px.width = surface->width;
-   surf.logical_level0_px.height = surface->height;
-
    union isl_color_value clear_color = { .u32 = { 0, 0, 0, 0 } };
 
    const struct isl_surf *aux_surf = NULL;
@@ -621,16 +615,13 @@ gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
     * prevents the clobbering.
     */
    params.dst.surf.samples = MAX2(mt->num_samples, 1);
-   if (params.depth.surf.samples > 1) {
-      params.depth.width = ALIGN(mt->logical_width0, 8);
-      params.depth.height = ALIGN(mt->logical_height0, 4);
-   } else {
-      params.depth.width = ALIGN(params.depth.width, 8);
-      params.depth.height = ALIGN(params.depth.height, 4);
-   }
+   params.depth.surf.logical_level0_px.width =
+      ALIGN(params.depth.surf.logical_level0_px.width, 8);
+   params.depth.surf.logical_level0_px.height =
+      ALIGN(params.depth.surf.logical_level0_px.height, 4);
 
-   params.x1 = params.depth.width;
-   params.y1 = params.depth.height;
+   params.x1 = params.depth.surf.logical_level0_px.width;
+   params.y1 = params.depth.surf.logical_level0_px.height;
 
    assert(intel_miptree_level_has_hiz(mt, level));
 
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index cf2c206..aea8456 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -94,18 +94,6 @@ struct brw_blorp_surface_info
     */
    uint32_t layer;
 
-   /**
-    * Width of the miplevel to be used.  For surfaces using
-    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
-    */
-   uint32_t width;
-
-   /**
-    * Height of the miplevel to be used.  For surfaces using
-    * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
-    */
-   uint32_t height;
-
    uint32_t bo_offset;
    uint32_t tile_x_sa, tile_y_sa;
 };
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 12e9e0e..b67d8a2 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1812,24 +1812,31 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
          params.y0 = ROUND_DOWN_TO(params.y0, 4);
          params.x1 = ALIGN(params.x1 * 2, 4);
          params.y1 = ALIGN(params.y1, 4);
+         params.dst.surf.logical_level0_px.width *= 2;
          break;
       case 4:
          params.x0 = ROUND_DOWN_TO(params.x0 * 2, 4);
          params.y0 = ROUND_DOWN_TO(params.y0 * 2, 4);
          params.x1 = ALIGN(params.x1 * 2, 4);
          params.y1 = ALIGN(params.y1 * 2, 4);
+         params.dst.surf.logical_level0_px.width *= 2;
+         params.dst.surf.logical_level0_px.height *= 2;
          break;
       case 8:
          params.x0 = ROUND_DOWN_TO(params.x0 * 4, 8);
          params.y0 = ROUND_DOWN_TO(params.y0 * 2, 4);
          params.x1 = ALIGN(params.x1 * 4, 8);
          params.y1 = ALIGN(params.y1 * 2, 4);
+         params.dst.surf.logical_level0_px.width *= 4;
+         params.dst.surf.logical_level0_px.height *= 2;
          break;
       case 16:
          params.x0 = ROUND_DOWN_TO(params.x0 * 4, 8);
          params.y0 = ROUND_DOWN_TO(params.y0 * 4, 8);
          params.x1 = ALIGN(params.x1 * 4, 8);
          params.y1 = ALIGN(params.y1 * 4, 8);
+         params.dst.surf.logical_level0_px.width *= 4;
+         params.dst.surf.logical_level0_px.height *= 4;
          break;
       default:
          unreachable("Unrecognized sample count in brw_blorp_blit_params ctor");
@@ -1915,8 +1922,10 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
       params.y0 = ROUND_DOWN_TO(params.y0, y_align) / 2;
       params.x1 = ALIGN(params.x1, x_align) * 2;
       params.y1 = ALIGN(params.y1, y_align) / 2;
-      params.dst.width = ALIGN(params.dst.width, x_align) * 2;
-      params.dst.height = ALIGN(params.dst.height, y_align) / 2;
+      params.dst.surf.logical_level0_px.width =
+         ALIGN(params.dst.surf.logical_level0_px.width, x_align) * 2;
+      params.dst.surf.logical_level0_px.height =
+         ALIGN(params.dst.surf.logical_level0_px.height, y_align) / 2;
       params.dst.tile_x_sa *= 2;
       params.dst.tile_y_sa /= 2;
       wm_prog_key.use_kill = true;
@@ -1941,8 +1950,10 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
        * TODO: what if this makes the texture size too large?
        */
       const unsigned x_align = 8, y_align = params.src.surf.samples != 0 ? 8 : 4;
-      params.src.width = ALIGN(params.src.width, x_align) * 2;
-      params.src.height = ALIGN(params.src.height, y_align) / 2;
+      params.src.surf.logical_level0_px.width =
+         ALIGN(params.src.surf.logical_level0_px.width, x_align) * 2;
+      params.src.surf.logical_level0_px.height =
+         ALIGN(params.src.surf.logical_level0_px.height, y_align) / 2;
       params.src.tile_x_sa *= 2;
       params.src.tile_y_sa /= 2;
    }
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c b/src/mesa/drivers/dri/i965/gen6_blorp.c
index a0092e7..f3ed936 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -715,8 +715,8 @@ gen6_blorp_emit_depth_stencil_config(struct brw_context *brw,
        * larger to allow the fast depth clear to fit the hardware
        * alignment requirements. (8x4)
        */
-      surfwidth = params->depth.width;
-      surfheight = params->depth.height;
+      surfwidth = params->depth.surf.logical_level0_px.width;
+      surfheight = params->depth.surf.logical_level0_px.height;
    } else {
       surfwidth = params->depth.mt->logical_width0;
       surfheight = params->depth.mt->logical_height0;
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.c b/src/mesa/drivers/dri/i965/gen7_blorp.c
index ab34273..5e37a85 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.c
@@ -587,8 +587,8 @@ gen7_blorp_emit_depth_stencil_config(struct brw_context *brw,
        * larger to allow the fast depth clear to fit the hardware
        * alignment requirements. (8x4)
        */
-      surfwidth = params->depth.width;
-      surfheight = params->depth.height;
+      surfwidth = params->depth.surf.logical_level0_px.width;
+      surfheight = params->depth.surf.logical_level0_px.height;
    } else {
       surfwidth = params->depth.mt->logical_width0;
       surfheight = params->depth.mt->logical_height0;
-- 
2.5.0.400.gff86faf



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