[Mesa-dev] [PATCH 3/3] spirv: add support for Int64 capability

[Dave Airlie]

From: Dave Airlie <airlied at redhat.com>

This just adds the support at the spirv->nir level for the Int64
cap.

Signed-off-by: Dave Airlie <airlied at redhat.com>
---
 src/compiler/spirv/nir_spirv.h    | 1 +
 src/compiler/spirv/spirv_to_nir.c | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
index e43e9b5..34cb5a5 100644
--- a/src/compiler/spirv/nir_spirv.h
+++ b/src/compiler/spirv/nir_spirv.h
@@ -50,6 +50,7 @@ struct nir_spirv_supported_extensions {
    bool tessellation;
    bool draw_parameters;
    bool image_write_without_format;
+   bool int64;
 };
 
 nir_function *spirv_to_nir(const uint32_t *words, size_t word_count,
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 7bd32ab..07a33ea 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2669,7 +2669,6 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
       case SpvCapabilityVector16:
       case SpvCapabilityFloat16Buffer:
       case SpvCapabilityFloat16:
-      case SpvCapabilityInt64:
       case SpvCapabilityInt64Atomics:
       case SpvCapabilityAtomicStorage:
       case SpvCapabilityInt16:
@@ -2687,6 +2686,9 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
       case SpvCapabilityFloat64:
          spv_check_supported(float64, cap);
          break;
+      case SpvCapabilityInt64:
+         spv_check_supported(int64, cap);
+         break;
 
       case SpvCapabilityAddresses:
       case SpvCapabilityKernel:
-- 
2.7.4