[Mesa-dev] [PATCH 07/51] i965: Move struct intel_batchbuffer from brw_context.h to brw_batch.h
Chris Wilson
chris at chris-wilson.co.uk
Tue Jan 10 21:23:30 UTC 2017
To ease future transitions.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
src/mesa/drivers/dri/i965/brw_batch.h | 32 ++++++++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_context.h | 32 --------------------------------
2 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_batch.h b/src/mesa/drivers/dri/i965/brw_batch.h
index 7268e26a85..a1307c1a0e 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -35,6 +35,38 @@ extern "C" {
typedef drm_intel_bo brw_bo;
+enum brw_gpu_ring {
+ UNKNOWN_RING,
+ RENDER_RING,
+ BLT_RING,
+};
+
+struct intel_batchbuffer {
+ /** Current batchbuffer being queued up. */
+ brw_bo *bo;
+ /** Last BO submitted to the hardware. Used for glFinish(). */
+ brw_bo *last_bo;
+
+#ifdef DEBUG
+ uint16_t emit, total;
+#endif
+ uint16_t reserved_space;
+ uint32_t *map_next;
+ uint32_t *map;
+ uint32_t *cpu_map;
+#define BATCH_SZ (8192*sizeof(uint32_t))
+
+ uint32_t state_batch_offset;
+ enum brw_gpu_ring ring;
+ bool needs_sol_reset;
+ bool state_base_address_emitted;
+
+ struct {
+ uint32_t *map_next;
+ int reloc_count;
+ } saved;
+};
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 50c6255ab5..a4c963acde 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -552,38 +552,6 @@ struct brw_query_object {
bool flushed;
};
-enum brw_gpu_ring {
- UNKNOWN_RING,
- RENDER_RING,
- BLT_RING,
-};
-
-struct intel_batchbuffer {
- /** Current batchbuffer being queued up. */
- brw_bo *bo;
- /** Last BO submitted to the hardware. Used for glFinish(). */
- brw_bo *last_bo;
-
-#ifdef DEBUG
- uint16_t emit, total;
-#endif
- uint16_t reserved_space;
- uint32_t *map_next;
- uint32_t *map;
- uint32_t *cpu_map;
-#define BATCH_SZ (8192*sizeof(uint32_t))
-
- uint32_t state_batch_offset;
- enum brw_gpu_ring ring;
- bool needs_sol_reset;
- bool state_base_address_emitted;
-
- struct {
- uint32_t *map_next;
- int reloc_count;
- } saved;
-};
-
#define MAX_GS_INPUT_VERTICES 6
#define BRW_MAX_XFB_STREAMS 4
--
2.11.0
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