[Mesa-dev] [PATCH 09/51] i965: Add a couple of utility functions to ref/unref a brw_bo
Chris Wilson
chris at chris-wilson.co.uk
Tue Jan 10 21:23:32 UTC 2017
To further reduce churn when replacing the buffer object implementation,
wrap the existing drm_intel_bo_reference/drm_intel_bo_unreference.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
src/mesa/drivers/dri/i965/brw_batch.h | 12 ++++++++++
src/mesa/drivers/dri/i965/brw_context.c | 29 ++++++++----------------
src/mesa/drivers/dri/i965/brw_draw.c | 13 +++++------
src/mesa/drivers/dri/i965/brw_draw_upload.c | 10 ++++----
src/mesa/drivers/dri/i965/brw_object_purgeable.c | 2 +-
src/mesa/drivers/dri/i965/brw_program.c | 7 +++---
src/mesa/drivers/dri/i965/brw_program_cache.c | 4 ++--
src/mesa/drivers/dri/i965/brw_queryobj.c | 10 ++++----
src/mesa/drivers/dri/i965/brw_sync.c | 10 ++++----
src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 2 +-
src/mesa/drivers/dri/i965/gen6_queryobj.c | 4 ++--
src/mesa/drivers/dri/i965/gen6_sol.c | 4 ++--
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 17 +++++---------
src/mesa/drivers/dri/i965/intel_buffer_objects.c | 14 ++++++------
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++++++++---------
src/mesa/drivers/dri/i965/intel_screen.c | 4 ++--
src/mesa/drivers/dri/i965/intel_upload.c | 7 +++---
17 files changed, 81 insertions(+), 89 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_batch.h b/src/mesa/drivers/dri/i965/brw_batch.h
index d6feb3ca5f..a3aa2cba89 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -67,6 +67,18 @@ typedef struct brw_batch {
} saved;
} brw_batch;
+inline static brw_bo *brw_bo_get(brw_bo *bo)
+{
+ drm_intel_bo_reference(bo);
+ return bo;
+}
+
+inline static void brw_bo_put(brw_bo *bo)
+{
+ if (bo)
+ drm_intel_bo_unreference(bo);
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 1ca927a685..9edfc525a3 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1170,21 +1170,15 @@ intelDestroyContext(__DRIcontext * driContextPriv)
brw_destroy_state(brw);
brw_draw_destroy(brw);
- drm_intel_bo_unreference(brw->curbe.curbe_bo);
- if (brw->vs.base.scratch_bo)
- drm_intel_bo_unreference(brw->vs.base.scratch_bo);
- if (brw->tcs.base.scratch_bo)
- drm_intel_bo_unreference(brw->tcs.base.scratch_bo);
- if (brw->tes.base.scratch_bo)
- drm_intel_bo_unreference(brw->tes.base.scratch_bo);
- if (brw->gs.base.scratch_bo)
- drm_intel_bo_unreference(brw->gs.base.scratch_bo);
- if (brw->wm.base.scratch_bo)
- drm_intel_bo_unreference(brw->wm.base.scratch_bo);
+ brw_bo_put(brw->curbe.curbe_bo);
+ brw_bo_put(brw->vs.base.scratch_bo);
+ brw_bo_put(brw->tcs.base.scratch_bo);
+ brw_bo_put(brw->tes.base.scratch_bo);
+ brw_bo_put(brw->gs.base.scratch_bo);
+ brw_bo_put(brw->wm.base.scratch_bo);
gen7_reset_hw_bt_pool_offsets(brw);
- drm_intel_bo_unreference(brw->hw_bt_pool.bo);
- brw->hw_bt_pool.bo = NULL;
+ brw_bo_put(brw->hw_bt_pool.bo);
drm_intel_gem_context_destroy(brw->hw_ctx);
@@ -1200,10 +1194,8 @@ intelDestroyContext(__DRIcontext * driContextPriv)
brw_fini_pipe_control(brw);
intel_batchbuffer_free(&brw->batch);
- drm_intel_bo_unreference(brw->throttle_batch[1]);
- drm_intel_bo_unreference(brw->throttle_batch[0]);
- brw->throttle_batch[1] = NULL;
- brw->throttle_batch[0] = NULL;
+ brw_bo_put(brw->throttle_batch[1]);
+ brw_bo_put(brw->throttle_batch[0]);
driDestroyOptionCache(&brw->optionCache);
@@ -1650,6 +1642,7 @@ intel_process_dri2_buffer(struct brw_context *brw,
intel_update_winsys_renderbuffer_miptree(brw, rb, bo,
drawable->w, drawable->h,
buffer->pitch);
+ brw_bo_put(bo);
if (_mesa_is_front_buffer_drawing(fb) &&
(buffer->attachment == __DRI_BUFFER_FRONT_LEFT ||
@@ -1659,8 +1652,6 @@ intel_process_dri2_buffer(struct brw_context *brw,
}
assert(rb->mt);
-
- drm_intel_bo_unreference(bo);
}
/**
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 0805bac3d2..55ff0ba7a0 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -290,7 +290,7 @@ brw_merge_inputs(struct brw_context *brw,
GLuint i;
for (i = 0; i < brw->vb.nr_buffers; i++) {
- drm_intel_bo_unreference(brw->vb.buffers[i].bo);
+ brw_bo_put(brw->vb.buffers[i].bo);
brw->vb.buffers[i].bo = NULL;
}
brw->vb.nr_buffers = 0;
@@ -550,13 +550,12 @@ brw_try_draw_prims(struct gl_context *ctx,
brw->draw.params.gl_basevertex = new_basevertex;
brw->draw.params.gl_baseinstance = new_baseinstance;
- drm_intel_bo_unreference(brw->draw.draw_params_bo);
+ brw_bo_put(brw->draw.draw_params_bo);
if (prims[i].is_indirect) {
/* Point draw_params_bo at the indirect buffer. */
brw->draw.draw_params_bo =
- intel_buffer_object(ctx->DrawIndirectBuffer)->buffer;
- drm_intel_bo_reference(brw->draw.draw_params_bo);
+ brw_bo_get(intel_buffer_object(ctx->DrawIndirectBuffer)->buffer);
brw->draw.draw_params_offset =
prims[i].indirect_offset + (prims[i].indexed ? 12 : 8);
} else {
@@ -574,7 +573,7 @@ brw_try_draw_prims(struct gl_context *ctx,
* the loop.
*/
brw->draw.gl_drawid = prims[i].draw_id;
- drm_intel_bo_unreference(brw->draw.draw_id_bo);
+ brw_bo_put(brw->draw.draw_id_bo);
brw->draw.draw_id_bo = NULL;
if (i > 0 && vs_prog_data->uses_drawid)
brw->ctx.NewDriverState |= BRW_NEW_VERTICES;
@@ -710,7 +709,7 @@ brw_draw_destroy(struct brw_context *brw)
unsigned i;
for (i = 0; i < brw->vb.nr_buffers; i++) {
- drm_intel_bo_unreference(brw->vb.buffers[i].bo);
+ brw_bo_put(brw->vb.buffers[i].bo);
brw->vb.buffers[i].bo = NULL;
}
brw->vb.nr_buffers = 0;
@@ -720,6 +719,6 @@ brw_draw_destroy(struct brw_context *brw)
}
brw->vb.nr_enabled = 0;
- drm_intel_bo_unreference(brw->ib.bo);
+ brw_bo_put(brw->ib.bo);
brw->ib.bo = NULL;
}
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 21d2ae3b92..8f94f6f265 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -615,9 +615,10 @@ brw_prepare_vertices(struct brw_context *brw)
const uint32_t start = buffer_range_start[i];
const uint32_t range = buffer_range_end[i] - buffer_range_start[i];
+ brw_bo *bo;
- buffer->bo = intel_bufferobj_buffer(brw, enabled_buffer[i], start, range);
- drm_intel_bo_reference(buffer->bo);
+ bo = intel_bufferobj_buffer(brw, enabled_buffer[i], start, range);
+ buffer->bo = brw_bo_get(bo);
}
/* If we need to upload all the arrays, then we can trim those arrays to
@@ -1100,10 +1101,9 @@ brw_upload_indices(struct brw_context *brw)
intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
offset, ib_size);
if (bo != brw->ib.bo) {
- drm_intel_bo_unreference(brw->ib.bo);
- brw->ib.bo = bo;
+ brw_bo_put(brw->ib.bo);
+ brw->ib.bo = brw_bo_get(bo);
brw->ib.size = bufferobj->Size;
- drm_intel_bo_reference(bo);
}
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_object_purgeable.c b/src/mesa/drivers/dri/i965/brw_object_purgeable.c
index 69c9d48881..08d4cfccaa 100644
--- a/src/mesa/drivers/dri/i965/brw_object_purgeable.c
+++ b/src/mesa/drivers/dri/i965/brw_object_purgeable.c
@@ -125,7 +125,7 @@ intel_buffer_object_unpurgeable(struct gl_context * ctx,
return GL_UNDEFINED_APPLE;
if (option == GL_UNDEFINED_APPLE || !intel_bo_unpurgeable(intel->buffer)) {
- drm_intel_bo_unreference(intel->buffer);
+ brw_bo_put(intel->buffer);
intel->buffer = NULL;
return GL_UNDEFINED_APPLE;
}
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index fe5338b8b2..034ea4fa1e 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -334,7 +334,7 @@ brw_get_scratch_bo(struct brw_context *brw,
brw_bo *old_bo = *scratch_bo;
if (old_bo && old_bo->size < size) {
- drm_intel_bo_unreference(old_bo);
+ brw_bo_put(old_bo);
old_bo = NULL;
}
@@ -356,8 +356,7 @@ brw_alloc_stage_scratch(struct brw_context *brw,
if (stage_state->per_thread_scratch < per_thread_size) {
stage_state->per_thread_scratch = per_thread_size;
- if (stage_state->scratch_bo)
- drm_intel_bo_unreference(stage_state->scratch_bo);
+ brw_bo_put(stage_state->scratch_bo);
stage_state->scratch_bo =
drm_intel_bo_alloc(brw->bufmgr, "shader scratch space",
@@ -629,7 +628,7 @@ brw_get_shader_time_index(struct brw_context *brw, struct gl_program *prog,
void
brw_destroy_shader_time(struct brw_context *brw)
{
- drm_intel_bo_unreference(brw->shader_time.bo);
+ brw_bo_put(brw->shader_time.bo);
brw->shader_time.bo = NULL;
}
diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c b/src/mesa/drivers/dri/i965/brw_program_cache.c
index 6128860456..fdbca8dbf2 100644
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -190,7 +190,7 @@ brw_cache_new_bo(struct brw_cache *cache, uint32_t new_size)
if (brw->has_llc)
drm_intel_bo_unmap(cache->bo);
- drm_intel_bo_unreference(cache->bo);
+ brw_bo_put(cache->bo);
cache->bo = new_bo;
cache->bo_used_by_gpu = false;
@@ -427,7 +427,7 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache)
if (brw->has_llc)
drm_intel_bo_unmap(cache->bo);
- drm_intel_bo_unreference(cache->bo);
+ brw_bo_put(cache->bo);
cache->bo = NULL;
brw_clear_cache(brw, cache);
free(cache->items);
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 6e5527d692..3f2689dbb6 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -161,7 +161,7 @@ brw_queryobj_get_results(struct gl_context *ctx,
/* Now that we've processed the data stored in the query's buffer object,
* we can release it.
*/
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = NULL;
}
@@ -193,7 +193,7 @@ brw_delete_query(struct gl_context *ctx, struct gl_query_object *q)
{
struct brw_query_object *query = (struct brw_query_object *)q;
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
free(query);
}
@@ -232,7 +232,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q)
* obtain the time elapsed. Notably, this includes time elapsed while
* the system was doing other work, such as running other applications.
*/
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = drm_intel_bo_alloc(brw->bufmgr, "timer query", 4096, 4096);
brw_write_timestamp(brw, query->bo, 0);
break;
@@ -247,7 +247,7 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q)
* Since we're starting a new query, we need to be sure to throw away
* any previous occlusion query results.
*/
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = NULL;
query->last_index = -1;
@@ -476,7 +476,7 @@ brw_query_counter(struct gl_context *ctx, struct gl_query_object *q)
assert(q->Target == GL_TIMESTAMP);
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = drm_intel_bo_alloc(brw->bufmgr, "timestamp query", 4096, 4096);
brw_write_timestamp(brw, query->bo, 0);
diff --git a/src/mesa/drivers/dri/i965/brw_sync.c b/src/mesa/drivers/dri/i965/brw_sync.c
index edb6a49cc6..cb53b29ffc 100644
--- a/src/mesa/drivers/dri/i965/brw_sync.c
+++ b/src/mesa/drivers/dri/i965/brw_sync.c
@@ -67,8 +67,7 @@ brw_fence_init(struct brw_context *brw, struct brw_fence *fence)
static void
brw_fence_finish(struct brw_fence *fence)
{
- if (fence->batch_bo)
- drm_intel_bo_unreference(fence->batch_bo);
+ brw_bo_put(fence->batch_bo);
mtx_destroy(&fence->mutex);
}
@@ -80,8 +79,7 @@ brw_fence_insert(struct brw_context *brw, struct brw_fence *fence)
assert(!fence->signalled);
brw_emit_mi_flush(brw);
- fence->batch_bo = brw->batch.bo;
- drm_intel_bo_reference(fence->batch_bo);
+ fence->batch_bo = brw_bo_get(brw->batch.bo);
intel_batchbuffer_flush(brw);
}
@@ -92,7 +90,7 @@ brw_fence_has_completed_locked(struct brw_fence *fence)
return true;
if (fence->batch_bo && !drm_intel_bo_busy(fence->batch_bo)) {
- drm_intel_bo_unreference(fence->batch_bo);
+ brw_bo_put(fence->batch_bo);
fence->batch_bo = NULL;
fence->signalled = true;
return true;
@@ -134,7 +132,7 @@ brw_fence_client_wait_locked(struct brw_context *brw, struct brw_fence *fence,
return false;
fence->signalled = true;
- drm_intel_bo_unreference(fence->batch_bo);
+ brw_bo_put(fence->batch_bo);
fence->batch_bo = NULL;
return true;
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index c87b8fae7c..9941dfabb0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -95,7 +95,7 @@ brw_upload_pull_constants(struct brw_context *brw,
brw_create_constant_surface(brw, const_bo, const_offset, size,
&stage_state->surf_offset[surf_index]);
- drm_intel_bo_unreference(const_bo);
+ brw_bo_put(const_bo);
brw->ctx.NewDriverState |= brw_new_constbuf;
}
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index 534badbb99..50a9be0e78 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -256,7 +256,7 @@ gen6_queryobj_get_results(struct gl_context *ctx,
/* Now that we've processed the data stored in the query's buffer object,
* we can release it.
*/
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = NULL;
query->Base.Ready = true;
@@ -275,7 +275,7 @@ gen6_begin_query(struct gl_context *ctx, struct gl_query_object *q)
struct brw_query_object *query = (struct brw_query_object *)q;
/* Since we're starting a new query, we need to throw away old results. */
- drm_intel_bo_unreference(query->bo);
+ brw_bo_put(query->bo);
query->bo = drm_intel_bo_alloc(brw->bufmgr, "query results", 4096, 4096);
/* For ARB_query_buffer_object: The result is not available */
diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c
index 972fda151f..6aa1dfb555 100644
--- a/src/mesa/drivers/dri/i965/gen6_sol.c
+++ b/src/mesa/drivers/dri/i965/gen6_sol.c
@@ -213,8 +213,8 @@ brw_delete_transform_feedback(struct gl_context *ctx,
_mesa_reference_buffer_object(ctx, &obj->Buffers[i], NULL);
}
- drm_intel_bo_unreference(brw_obj->offset_bo);
- drm_intel_bo_unreference(brw_obj->prim_count_bo);
+ brw_bo_put(brw_obj->offset_bo);
+ brw_bo_put(brw_obj->prim_count_bo);
free(brw_obj);
}
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 5e123eb9a6..8cf549706e 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -57,10 +57,7 @@ static void
intel_batchbuffer_reset(struct brw_batch *batch, dri_bufmgr *bufmgr,
bool has_llc)
{
- if (batch->last_bo != NULL) {
- drm_intel_bo_unreference(batch->last_bo);
- batch->last_bo = NULL;
- }
+ brw_bo_put(batch->last_bo);
batch->last_bo = batch->bo;
batch->bo = drm_intel_bo_alloc(bufmgr, "batchbuffer", BATCH_SZ, 4096);
@@ -110,8 +107,8 @@ void
intel_batchbuffer_free(struct brw_batch *batch)
{
free(batch->cpu_map);
- drm_intel_bo_unreference(batch->last_bo);
- drm_intel_bo_unreference(batch->bo);
+ brw_bo_put(batch->last_bo);
+ brw_bo_put(batch->bo);
}
void
@@ -296,7 +293,7 @@ throttle(struct brw_context *brw)
if (brw->throttle_batch[1]) {
if (!brw->disable_throttling)
drm_intel_bo_wait_rendering(brw->throttle_batch[1]);
- drm_intel_bo_unreference(brw->throttle_batch[1]);
+ brw_bo_put(brw->throttle_batch[1]);
}
brw->throttle_batch[1] = brw->throttle_batch[0];
brw->throttle_batch[0] = NULL;
@@ -388,10 +385,8 @@ _intel_batchbuffer_flush(struct brw_context *brw,
if (USED_BATCH(brw->batch) == 0)
return 0;
- if (brw->throttle_batch[0] == NULL) {
- brw->throttle_batch[0] = brw->batch.bo;
- drm_intel_bo_reference(brw->throttle_batch[0]);
- }
+ if (brw->throttle_batch[0] == NULL)
+ brw->throttle_batch[0] = brw_bo_get(brw->batch.bo);
if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) {
int bytes_for_commands = 4 * USED_BATCH(brw->batch);
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index dac3329e75..5fb2a884df 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -118,7 +118,7 @@ alloc_buffer_object(struct brw_context *brw,
static void
release_buffer(struct intel_buffer_object *intel_obj)
{
- drm_intel_bo_unreference(intel_obj->buffer);
+ brw_bo_put(intel_obj->buffer);
intel_obj->buffer = NULL;
}
@@ -165,7 +165,7 @@ brw_delete_buffer(struct gl_context * ctx, struct gl_buffer_object *obj)
*/
_mesa_buffer_unmap_all_mappings(ctx, obj);
- drm_intel_bo_unreference(intel_obj->buffer);
+ brw_bo_put(intel_obj->buffer);
_mesa_delete_buffer_object(ctx, obj);
}
@@ -275,7 +275,7 @@ brw_buffer_subdata(struct gl_context *ctx,
if (busy) {
if (size == intel_obj->Base.Size) {
/* Replace the current busy bo so the subdata doesn't stall. */
- drm_intel_bo_unreference(intel_obj->buffer);
+ brw_bo_put(intel_obj->buffer);
alloc_buffer_object(brw, intel_obj);
} else if (!intel_obj->prefer_stall_to_blit) {
perf_debug("Using a blit copy to avoid stalling on "
@@ -294,7 +294,7 @@ brw_buffer_subdata(struct gl_context *ctx,
temp_bo, 0,
size);
- drm_intel_bo_unreference(temp_bo);
+ brw_bo_put(temp_bo);
return;
} else {
perf_debug("Stalling on glBufferSubData(%ld, %ld) (%ldkb) to a busy "
@@ -390,7 +390,7 @@ brw_map_buffer_range(struct gl_context *ctx,
if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) {
if (drm_intel_bo_references(brw->batch.bo, intel_obj->buffer)) {
if (access & GL_MAP_INVALIDATE_BUFFER_BIT) {
- drm_intel_bo_unreference(intel_obj->buffer);
+ brw_bo_put(intel_obj->buffer);
alloc_buffer_object(brw, intel_obj);
} else {
perf_debug("Stalling on the GPU for mapping a busy buffer "
@@ -399,7 +399,7 @@ brw_map_buffer_range(struct gl_context *ctx,
}
} else if (drm_intel_bo_busy(intel_obj->buffer) &&
(access & GL_MAP_INVALIDATE_BUFFER_BIT)) {
- drm_intel_bo_unreference(intel_obj->buffer);
+ brw_bo_put(intel_obj->buffer);
alloc_buffer_object(brw, intel_obj);
}
}
@@ -561,7 +561,7 @@ brw_unmap_buffer(struct gl_context *ctx,
*/
brw_emit_mi_flush(brw);
- drm_intel_bo_unreference(intel_obj->range_map_bo[index]);
+ brw_bo_put(intel_obj->range_map_bo[index]);
intel_obj->range_map_bo[index] = NULL;
} else if (intel_obj->buffer != NULL) {
drm_intel_bo_unmap(intel_obj->buffer);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index f611c8b3df..88baed2bdb 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -704,7 +704,7 @@ intel_miptree_create(struct brw_context *brw,
mt->total_width, mt->total_height);
mt->tiling = I915_TILING_X;
- drm_intel_bo_unreference(mt->bo);
+ brw_bo_put(mt->bo);
mt->bo = drm_intel_bo_alloc_tiled(brw->bufmgr, "miptree",
mt->total_width, mt->total_height, mt->cpp,
&mt->tiling, &pitch, alloc_flags);
@@ -800,8 +800,7 @@ intel_miptree_create_for_bo(struct brw_context *brw,
if (!mt)
return NULL;
- drm_intel_bo_reference(bo);
- mt->bo = bo;
+ mt->bo = brw_bo_get(bo);
mt->pitch = pitch;
mt->offset = offset;
mt->tiling = tiling;
@@ -953,7 +952,7 @@ intel_miptree_hiz_buffer_free(struct intel_miptree_hiz_buffer *hiz_buf)
if (hiz_buf->mt)
intel_miptree_release(&hiz_buf->mt);
else
- drm_intel_bo_unreference(hiz_buf->aux_base.bo);
+ brw_bo_put(hiz_buf->aux_base.bo);
free(hiz_buf);
}
@@ -970,12 +969,12 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
DBG("%s deleting %p\n", __func__, *mt);
- drm_intel_bo_unreference((*mt)->bo);
+ brw_bo_put((*mt)->bo);
intel_miptree_release(&(*mt)->stencil_mt);
intel_miptree_release(&(*mt)->r8stencil_mt);
intel_miptree_hiz_buffer_free((*mt)->hiz_buf);
if ((*mt)->mcs_buf) {
- drm_intel_bo_unreference((*mt)->mcs_buf->bo);
+ brw_bo_put((*mt)->mcs_buf->bo);
free((*mt)->mcs_buf);
}
intel_resolve_map_clear(&(*mt)->hiz_map);
@@ -1457,7 +1456,7 @@ intel_miptree_init_mcs(struct brw_context *brw,
const int ret = brw_bo_map_gtt(brw, mt->mcs_buf->bo, "miptree");
if (unlikely(ret)) {
fprintf(stderr, "Failed to map mcs buffer into GTT\n");
- drm_intel_bo_unreference(mt->mcs_buf->bo);
+ brw_bo_put(mt->mcs_buf->bo);
free(mt->mcs_buf);
return;
}
@@ -1510,7 +1509,7 @@ intel_mcs_miptree_buf_create(struct brw_context *brw,
* structure should go away. We use miptree create simply as a means to make
* sure all the constraints for the buffer are satisfied.
*/
- drm_intel_bo_reference(temp_mt->bo);
+ brw_bo_get(temp_mt->bo);
intel_miptree_release(&temp_mt);
return buf;
@@ -1764,7 +1763,7 @@ intel_gen7_hiz_buf_create(struct brw_context *brw,
free(buf);
return NULL;
} else if (tiling != I915_TILING_Y) {
- drm_intel_bo_unreference(buf->aux_base.bo);
+ brw_bo_put(buf->aux_base.bo);
free(buf);
return NULL;
}
@@ -1861,7 +1860,7 @@ intel_gen8_hiz_buf_create(struct brw_context *brw,
free(buf);
return NULL;
} else if (tiling != I915_TILING_Y) {
- drm_intel_bo_unreference(buf->aux_base.bo);
+ brw_bo_put(buf->aux_base.bo);
free(buf);
return NULL;
}
@@ -2334,7 +2333,7 @@ intel_miptree_make_shareable(struct brw_context *brw,
if (mt->mcs_buf) {
intel_miptree_all_slices_resolve_color(brw, mt, 0);
mt->aux_disable |= (INTEL_AUX_DISABLE_CCS | INTEL_AUX_DISABLE_MCS);
- drm_intel_bo_unreference(mt->mcs_buf->bo);
+ brw_bo_put(mt->mcs_buf->bo);
free(mt->mcs_buf);
mt->mcs_buf = NULL;
}
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index f05e521b9a..f63d51d159 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -397,7 +397,7 @@ intel_setup_image_from_mipmap_tree(struct brw_context *brw, __DRIimage *image,
drm_intel_bo_unreference(image->bo);
image->bo = mt->bo;
- drm_intel_bo_reference(mt->bo);
+ drm_intel_bo_reference(image->bo);
}
static __DRIimage *
@@ -459,7 +459,7 @@ intel_create_image_from_renderbuffer(__DRIcontext *context,
image->data = loaderPrivate;
drm_intel_bo_unreference(image->bo);
image->bo = irb->mt->bo;
- drm_intel_bo_reference(irb->mt->bo);
+ drm_intel_bo_reference(image->bo);
image->width = rb->Width;
image->height = rb->Height;
image->pitch = irb->mt->pitch;
diff --git a/src/mesa/drivers/dri/i965/intel_upload.c b/src/mesa/drivers/dri/i965/intel_upload.c
index 82d9ef6e15..ab86439152 100644
--- a/src/mesa/drivers/dri/i965/intel_upload.c
+++ b/src/mesa/drivers/dri/i965/intel_upload.c
@@ -50,7 +50,7 @@ intel_upload_finish(struct brw_context *brw)
return;
drm_intel_bo_unmap(brw->upload.bo);
- drm_intel_bo_unreference(brw->upload.bo);
+ brw_bo_put(brw->upload.bo);
brw->upload.bo = NULL;
brw->upload.next_offset = 0;
}
@@ -106,9 +106,8 @@ intel_upload_space(struct brw_context *brw,
*out_offset = offset;
if (*out_bo != brw->upload.bo) {
- drm_intel_bo_unreference(*out_bo);
- *out_bo = brw->upload.bo;
- drm_intel_bo_reference(brw->upload.bo);
+ brw_bo_put(*out_bo);
+ *out_bo = brw_bo_get(brw->upload.bo);
}
return brw->upload.bo->virtual + offset;
--
2.11.0
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