[Mesa-dev] [PATCH 12/51] i965: Move the render_cache dirty set from the context to the batch

[Chris Wilson]

To reduce churn later, move the brw->render_cache dirty set into the
batch (i.e. brw->batch.render_cache).

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 src/mesa/drivers/dri/i965/brw_batch.h   |  7 +++++++
 src/mesa/drivers/dri/i965/brw_context.h |  7 -------
 src/mesa/drivers/dri/i965/intel_fbo.c   | 12 ++++++------
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_batch.h b/src/mesa/drivers/dri/i965/brw_batch.h
index 043a87cf15..860f1950f4 100644
--- a/src/mesa/drivers/dri/i965/brw_batch.h
+++ b/src/mesa/drivers/dri/i965/brw_batch.h
@@ -65,6 +65,13 @@ typedef struct brw_batch {
       uint32_t *map_next;
       int reloc_count;
    } saved;
+
+   /**
+    * Set of brw_bo* that have been rendered to within this batchbuffer
+    * and would need flushing before being used from another cache domain that
+    * isn't coherent with it (i.e. the sampler).
+    */
+   struct set *render_cache;
 } brw_batch;
 
 inline static brw_bo *brw_bo_get(brw_bo *bo)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index c7c25a7274..8051db12be 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -701,13 +701,6 @@ struct brw_context
    uint8_t pipe_controls_since_last_cs_stall;
 
    /**
-    * Set of brw_bo* that have been rendered to within this batchbuffer
-    * and would need flushing before being used from another cache domain that
-    * isn't coherent with it (i.e. the sampler).
-    */
-   struct set *render_cache;
-
-   /**
     * Number of resets observed in the system at context creation.
     *
     * This is tracked in the context so that we can determine that another
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index a07f33242b..627a81111f 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -1051,15 +1051,15 @@ brw_render_cache_set_clear(struct brw_context *brw)
 {
    struct set_entry *entry;
 
-   set_foreach(brw->render_cache, entry) {
-      _mesa_set_remove(brw->render_cache, entry);
+   set_foreach(brw->batch.render_cache, entry) {
+      _mesa_set_remove(brw->batch.render_cache, entry);
    }
 }
 
 void
 brw_render_cache_set_add_bo(struct brw_context *brw, brw_bo *bo)
 {
-   _mesa_set_add(brw->render_cache, bo);
+   _mesa_set_add(brw->batch.render_cache, bo);
 }
 
 /**
@@ -1077,7 +1077,7 @@ brw_render_cache_set_add_bo(struct brw_context *brw, brw_bo *bo)
 void
 brw_render_cache_set_check_flush(struct brw_context *brw, brw_bo *bo)
 {
-   if (!_mesa_set_search(brw->render_cache, bo))
+   if (!_mesa_set_search(brw->batch.render_cache, bo))
       return;
 
    if (brw->gen >= 6) {
@@ -1116,6 +1116,6 @@ intel_fbo_init(struct brw_context *brw)
    dd->EGLImageTargetRenderbufferStorage =
       intel_image_target_renderbuffer_storage;
 
-   brw->render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
-                                        _mesa_key_pointer_equal);
+   brw->batch.render_cache = _mesa_set_create(brw, _mesa_hash_pointer,
+                                              _mesa_key_pointer_equal);
 }
-- 
2.11.0