[Mesa-dev] [PATCH 40/51] i965: Wrap brw_memory_barrier with begin/end

[Chris Wilson]

Or rather export a higher level brw_pipe_control_flush() that wraps the
brw_emit_pipe_control_flush() into a batch as appropriate for the
caller.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 src/mesa/drivers/dri/i965/brw_context.h      | 1 +
 src/mesa/drivers/dri/i965/brw_pipe_control.c | 9 +++++++++
 src/mesa/drivers/dri/i965/brw_program.c      | 2 +-
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 8e95674543..2de8b7afd8 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1680,6 +1680,7 @@ void gen7_emit_vs_workaround_flush(struct brw_context *brw);
 void gen7_emit_cs_stall_flush(struct brw_context *brw);
 
 void brw_mi_flush(struct brw_context *brw, enum brw_gpu_ring ring);
+void brw_pipe_control_flush(struct brw_context *brw, unsigned flags);
 
 bool brw_check_dirty(struct brw_context *ctx, brw_bo *bo);
 
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index 7743e3404e..a8a8f9ef36 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -166,6 +166,15 @@ brw_emit_pipe_control_flush(struct brw_context *brw, uint32_t flags)
    }
 }
 
+void
+brw_pipe_control_flush(struct brw_context *brw, unsigned flags)
+{
+   if (brw_batch_begin(&brw->batch, 60, RENDER_RING) >= 0) {
+      brw_emit_pipe_control_flush(brw, flags);
+      brw_batch_end(&brw->batch);
+   }
+}
+
 inline static uint32_t lower_32_bits(uint64_t x)
 {
    return x;
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 97ac270248..5941861fdf 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -286,7 +286,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
    if (brw->gen == 7 && !brw->is_haswell)
       bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
 
-   brw_emit_pipe_control_flush(brw, bits);
+   brw_pipe_control_flush(brw, bits);
 }
 
 static void
-- 
2.11.0