[Mesa-dev] [PATCH 15/22] i965/vec4: fix SIMD-width lowering for double_to_single operation in IVB/VLV

[Matt Turner]

On Thu, Jan 5, 2017 at 5:07 AM, Samuel Iglesias Gonsálvez
<siglesias at igalia.com> wrote:
> From: "Juan A. Suarez Romero" <jasuarez at igalia.com>
>
> When spliting double_to_single() in Ivybridge/Valleyview, the second
> part should use a temporal register, and then move the values to the
> second half of the original destiny, so we get all the results in the

Typo: destination

> same register.

Please change double_to_single() to VEC4_OPCODE_FROM_DOUBLE  (or just
FROM_DOUBLE) throughout.

> ---
>  src/mesa/drivers/dri/i965/brw_vec4.cpp           | 17 +++++++++++++----
>  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp |  1 +
>  2 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index f533207..afabc22 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -2199,9 +2199,15 @@ vec4_visitor::lower_simd_width()
>           linst->group = channel_offset;
>           linst->size_written = size_written;
>
> +         /* When spliting double_to_single() in Ivybridge, the second part

Typo: splitting

s/in/on/