[Mesa-dev] [PATCH 05/11] radeonsi: si_cp_dma_prepare is a no-op for L2 prefetches

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_cp_dma.c | 12 +++++++-----
 src/gallium/drivers/radeonsi/si_pipe.h   |  5 +++++
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 4c79dfe..06e4899 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -126,20 +126,26 @@ static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency cohe
 {
 	return coher == R600_COHERENCY_SHADER &&
 	       sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0;
 }
 
 static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,
 			      struct pipe_resource *src, unsigned byte_count,
 			      uint64_t remaining_size, unsigned user_flags,
 			      bool *is_first, unsigned *packet_flags)
 {
+	/* Fast exit for a CPDMA prefetch. */
+	if ((user_flags & SI_CPDMA_SKIP_ALL) == SI_CPDMA_SKIP_ALL) {
+		*is_first = false;
+		return;
+	}
+
 	if (!(user_flags & SI_CPDMA_SKIP_BO_LIST_UPDATE)) {
 		/* Count memory usage in so that need_cs_space can take it into account. */
 		r600_context_add_resource_size(&sctx->b.b, dst);
 		if (src)
 			r600_context_add_resource_size(&sctx->b.b, src);
 	}
 
 	if (!(user_flags & SI_CPDMA_SKIP_CHECK_CS_SPACE))
 		si_need_cs_space(sctx);
 
@@ -388,21 +394,17 @@ void si_copy_buffer(struct si_context *sctx,
 	/* If it's not a prefetch... */
 	if (dst_offset != src_offset)
 		sctx->b.num_cp_dma_calls++;
 }
 
 void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf,
 			      uint64_t offset, unsigned size)
 {
 	assert(sctx->b.chip_class >= CIK);
 
-	si_copy_buffer(sctx, buf, buf, offset, offset, size,
-		       SI_CPDMA_SKIP_CHECK_CS_SPACE |
-		       SI_CPDMA_SKIP_SYNC_AFTER |
-		       SI_CPDMA_SKIP_SYNC_BEFORE |
-		       SI_CPDMA_SKIP_GFX_SYNC);
+	si_copy_buffer(sctx, buf, buf, offset, offset, size, SI_CPDMA_SKIP_ALL);
 }
 
 void si_init_cp_dma_functions(struct si_context *sctx)
 {
 	sctx->b.clear_buffer = si_clear_buffer;
 }
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 64218ee..c9ae27e 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -366,20 +366,25 @@ void si_resource_copy_region(struct pipe_context *ctx,
 			     struct pipe_resource *src,
 			     unsigned src_level,
 			     const struct pipe_box *src_box);
 
 /* si_cp_dma.c */
 #define SI_CPDMA_SKIP_CHECK_CS_SPACE	(1 << 0) /* don't call need_cs_space */
 #define SI_CPDMA_SKIP_SYNC_AFTER	(1 << 1) /* don't wait for DMA after the copy */
 #define SI_CPDMA_SKIP_SYNC_BEFORE	(1 << 2) /* don't wait for DMA before the copy (RAW hazards) */
 #define SI_CPDMA_SKIP_GFX_SYNC		(1 << 3) /* don't flush caches and don't wait for PS/CS */
 #define SI_CPDMA_SKIP_BO_LIST_UPDATE	(1 << 4) /* don't update the BO list */
+#define SI_CPDMA_SKIP_ALL (SI_CPDMA_SKIP_CHECK_CS_SPACE | \
+			   SI_CPDMA_SKIP_SYNC_AFTER | \
+			   SI_CPDMA_SKIP_SYNC_BEFORE | \
+			   SI_CPDMA_SKIP_GFX_SYNC | \
+			   SI_CPDMA_SKIP_BO_LIST_UPDATE)
 
 void si_copy_buffer(struct si_context *sctx,
 		    struct pipe_resource *dst, struct pipe_resource *src,
 		    uint64_t dst_offset, uint64_t src_offset, unsigned size,
 		    unsigned user_flags);
 void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf,
 			      uint64_t offset, unsigned size);
 void si_init_cp_dma_functions(struct si_context *sctx);
 
 /* si_debug.c */
-- 
2.7.4