[Mesa-dev] [PATCH] i965/blorp: Add also depth buffer to render cache

[Francisco Jerez]

"Pohjolainen, Topi" <topi.pohjolainen at gmail.com> writes:

> On Thu, Jan 19, 2017 at 12:10:02PM -0800, Francisco Jerez wrote:
>> Topi Pohjolainen <topi.pohjolainen at gmail.com> writes:
>> 
>> > CC: Francisco Jerez <currojerez at riseup.net>
>> > CC: Kenneth Graunke <kenneth at whitecape.org>
>> > CC: Jason Ekstrand <jason at jlekstrand.net>
>> > Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
>> > ---
>> >  src/mesa/drivers/dri/i965/genX_blorp_exec.c | 3 +++
>> >  1 file changed, 3 insertions(+)
>> >
>> > diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
>> > index 647a362..594bd5a 100644
>> > --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
>> > +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
>> > @@ -261,4 +261,7 @@ retry:
>> >  
>> >     if (params->dst.enabled)
>> >        brw_render_cache_set_add_bo(brw, params->dst.addr.buffer);
>> > +
>> > +   if (params->depth.enabled)
>> > +      brw_render_cache_set_add_bo(brw, params->depth.addr.buffer);
>> 
>> What about the stencil buffer?  Stencil texturing is likely to be
>> unhappy unless you mark it as pending flush as well...
>
> As far as I know i965 only clears depth and color using blorp, stencil gets
> cleared using meta. Blits in turn have it as destination.
>

That doesn't sound like a safe assumption to rely on looking forward if
the blorp api already exposes support for stencil writes -- Tracking
down the ultimate cause of a memory coherency bugs can be really hard,
why make our future lives more intentionally difficult by introducing
buggy corner cases like this?  The extra check is not going to hurt
performance or cause any other harmful side effects unless stencil
writes are used...

>> 
>> >  }
>> > -- 
>> > 2.5.5
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