[Mesa-dev] [PATCH 11/27] i965/hiz/gen6: Stop setting false qpitch

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Mon, Jan 16, 2017 at 1:13 AM, Topi Pohjolainen <
topi.pohjolainen at gmail.com> wrote:

> which is not applicable for "all slices at each lod". Current
> logic makes one to believe it has some purpose. When miptree
> layout is calculated brw_miptree_layout_texture_array() sets
> the qpitch unconditionally but later on ignores it altogether
> for ALL_SLICES_AT_EACH_LOD.
>
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 606d4c2..825c6a0 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -1901,7 +1901,13 @@ intel_hiz_miptree_buf_create(struct brw_context
> *brw,
>     buf->aux_base.bo = buf->mt->bo;
>     buf->aux_base.size = buf->mt->total_height * buf->mt->pitch;
>     buf->aux_base.pitch = buf->mt->pitch;
> -   buf->aux_base.qpitch = buf->mt->qpitch;
> +
> +   /* On gen6 hiz is unconditionally laid out packing all slices
> +    * at each level-of-detail (LOD). This means there is no valid qpitch
> +    * setting. In fact, this is ignored when hardware is setup - there is
> no
> +    * hardware qpitch setting of hiz on gen6.
> +    */
> +   buf->aux_base.qpitch = 0;
>
>     return buf;
>  }
> --
> 2.5.5
>
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