[Mesa-dev] [PATCH 009/140] amdgpu/addrlib: Add GetMaxAlignments

Marek Olšák maraeo at gmail.com
Mon Mar 20 22:42:19 UTC 2017


From: Xavi Zhang <xavi.zhang at amd.com>

---
 src/amd/addrlib/addrinterface.cpp  | 30 +++++++++++++++++++++++++
 src/amd/addrlib/addrinterface.h    | 26 ++++++++++++++++++++++
 src/amd/addrlib/core/addrlib.cpp   | 33 ++++++++++++++++++++++++++++
 src/amd/addrlib/core/addrlib.h     |  6 +++++
 src/amd/addrlib/r800/ciaddrlib.cpp | 40 +++++++++++++++++++++++++++++++++
 src/amd/addrlib/r800/ciaddrlib.h   |  3 ++-
 src/amd/addrlib/r800/siaddrlib.cpp | 45 ++++++++++++++++++++++++++++++++++++++
 src/amd/addrlib/r800/siaddrlib.h   |  2 ++
 8 files changed, 184 insertions(+), 1 deletion(-)

diff --git a/src/amd/addrlib/addrinterface.cpp b/src/amd/addrlib/addrinterface.cpp
index 6556927..b2120c6 100644
--- a/src/amd/addrlib/addrinterface.cpp
+++ b/src/amd/addrlib/addrinterface.cpp
@@ -999,10 +999,40 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
         returnCode = pLib->ComputePrtInfo(pIn, pOut);
     }
     else
     {
         returnCode = ADDR_ERROR;
     }
 
     return returnCode;
 }
 
+/**
+***************************************************************************************************
+*   AddrGetMaxAlignments
+*
+*   @brief
+*       Convert maximum alignments
+*
+*   @return
+*       ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE
+***************************************************************************************************
+*/
+ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
+    ADDR_HANDLE                     hLib, ///< [in] address lib handle
+    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) ///< [out] output structure
+{
+    AddrLib* pLib = AddrLib::GetAddrLib(hLib);
+
+    ADDR_E_RETURNCODE returnCode = ADDR_OK;
+
+    if (pLib != NULL)
+    {
+        returnCode = pLib->GetMaxAlignments(pOut);
+    }
+    else
+    {
+        returnCode = ADDR_ERROR;
+    }
+
+    return returnCode;
+}
diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h
index a50717c..764377a 100644
--- a/src/amd/addrlib/addrinterface.h
+++ b/src/amd/addrlib/addrinterface.h
@@ -2138,17 +2138,43 @@ typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
 *   @brief
 *       Compute DCC key size, base alignment
 *       info
 ***************************************************************************************************
 */
 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
     ADDR_HANDLE                             hLib,
     const ADDR_COMPUTE_DCCINFO_INPUT*       pIn,
     ADDR_COMPUTE_DCCINFO_OUTPUT*            pOut);
 
+/**
+***************************************************************************************************
+*   ADDR_GET_MAX_ALINGMENTS_OUTPUT
+*
+*   @brief
+*       Output structure of AddrGetMaxAlignments
+***************************************************************************************************
+*/
+typedef struct _ADDR_GET_MAX_ALINGMENTS_OUTPUT
+{
+    UINT_32 size;                   ///< Size of this structure in bytes
+    UINT_64 baseAlign;              ///< Maximum base alignment in bytes
+} ADDR_GET_MAX_ALINGMENTS_OUTPUT;
+
+/**
+***************************************************************************************************
+*   AddrGetMaxAlignments
+*
+*   @brief
+*       Gets maximnum alignments
+***************************************************************************************************
+*/
+ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
+    ADDR_HANDLE                     hLib,
+    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut);
+
 #if defined(__cplusplus)
 }
 #endif
 
 #endif // __ADDR_INTERFACE_H__
 
 
diff --git a/src/amd/addrlib/core/addrlib.cpp b/src/amd/addrlib/core/addrlib.cpp
index b92568e..4804b0d 100644
--- a/src/amd/addrlib/core/addrlib.cpp
+++ b/src/amd/addrlib/core/addrlib.cpp
@@ -1865,20 +1865,53 @@ ADDR_E_RETURNCODE AddrLib::ComputeCmaskCoordFromAddr(
                                          &pOut->y,
                                          &pOut->slice);
         }
     }
 
     return returnCode;
 }
 
 /**
 ***************************************************************************************************
+*   AddrLib::GetMaxAlignments
+*
+*   @brief
+*       Gets maximum alignments
+*
+*   @return
+*       ADDR_E_RETURNCODE
+***************************************************************************************************
+*/
+ADDR_E_RETURNCODE AddrLib::GetMaxAlignments(
+    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut    ///< [out] output structure
+    ) const
+{
+    ADDR_E_RETURNCODE returnCode = ADDR_OK;
+
+    if (GetFillSizeFieldsFlags() == TRUE)
+    {
+        if (pOut->size != sizeof(ADDR_GET_MAX_ALINGMENTS_OUTPUT))
+        {
+            returnCode = ADDR_PARAMSIZEMISMATCH;
+        }
+    }
+
+    if (returnCode == ADDR_OK)
+    {
+        returnCode = HwlGetMaxAlignments(pOut);
+    }
+
+    return returnCode;
+}
+
+/**
+***************************************************************************************************
 *   AddrLib::ComputeTileDataWidthAndHeight
 *
 *   @brief
 *       Compute the squared cache shape for per-tile data (CMASK and HTILE)
 *
 *   @return
 *       N/A
 *
 *   @note
 *       MacroWidth and macroHeight are measured in pixels
diff --git a/src/amd/addrlib/core/addrlib.h b/src/amd/addrlib/core/addrlib.h
index d693fd2..3221120 100644
--- a/src/amd/addrlib/core/addrlib.h
+++ b/src/amd/addrlib/core/addrlib.h
@@ -305,20 +305,22 @@ public:
         const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
         ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut) const;
 
     ADDR_E_RETURNCODE Flt32ToColorPixel(
         const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
         ELEM_FLT32TOCOLORPIXEL_OUTPUT* pOut) const;
 
     BOOL_32 GetExportNorm(
         const ELEM_GETEXPORTNORM_INPUT* pIn) const;
 
+    ADDR_E_RETURNCODE GetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
+
 protected:
     AddrLib();  // Constructor is protected
     AddrLib(const AddrClient* pClient);
 
     /// Pure Virtual function for Hwl computing surface info
     virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
         const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
         ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
 
     /// Pure Virtual function for Hwl computing surface address from coord
@@ -412,20 +414,24 @@ protected:
         return ADDR_NOTSUPPORTED;
     }
 
     /// Virtual function to get cmask address for tc compatible cmask
     virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
         const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
         ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
     {
         return ADDR_NOTSUPPORTED;
     }
+
+    /// Pure virtual function to get max alignments
+    virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const = 0;
+
     // Compute attributes
 
     // HTILE
     UINT_32    ComputeHtileInfo(
         ADDR_HTILE_FLAGS flags,
         UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
         BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
         ADDR_TILEINFO*  pTileInfo,
         UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
         UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index 5e5110a..1176ead 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -1812,10 +1812,50 @@ VOID CiAddrLib::HwlPadDimensions(
                         *pPitch += (dccFastClearPitchAlignInPixels - 1);
                         *pPitch /= dccFastClearPitchAlignInPixels;
                         *pPitch *= dccFastClearPitchAlignInPixels;
                     }
                 }
             }
         }
     }
 }
 
+/**
+***************************************************************************************************
+*   CiAddrLib::HwlGetMaxAlignments
+*
+*   @brief
+*       Gets maximum alignments
+*   @return
+*       ADDR_E_RETURNCODE
+***************************************************************************************************
+*/
+ADDR_E_RETURNCODE CiAddrLib::HwlGetMaxAlignments(
+    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut    ///< [out] output structure
+    ) const
+{
+    const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info);
+
+    // Initial size is 64 KiB for PRT.
+    UINT_64 maxBaseAlign = 64 * 1024;
+
+    for (UINT_32 i = 0; i < m_noOfMacroEntries; i++)
+    {
+        // The maximum tile size is 16 byte-per-pixel and either 8-sample or 8-slice.
+        UINT_32 tileSize = m_macroTileTable[i].tileSplitBytes;
+
+        UINT_64 baseAlign = tileSize * pipes * m_macroTileTable[i].banks *
+                            m_macroTileTable[i].bankWidth * m_macroTileTable[i].bankHeight;
+
+        if (baseAlign > maxBaseAlign)
+        {
+            maxBaseAlign = baseAlign;
+        }
+    }
+
+    if (pOut != NULL)
+    {
+        pOut->baseAlign = maxBaseAlign;
+    }
+
+    return ADDR_OK;
+}
diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h
index 4862bab..5630959 100644
--- a/src/amd/addrlib/r800/ciaddrlib.h
+++ b/src/amd/addrlib/r800/ciaddrlib.h
@@ -147,21 +147,22 @@ protected:
         AddrTileType* pTileType) const;
 
     virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
         const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
         ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
 
     virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
         const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
         ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
 
-protected:
+    virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
+
     virtual VOID HwlPadDimensions(
         AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
         UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
         UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
         UINT_32* pSlices, UINT_32 sliceAlign) const;
 
 private:
     VOID ReadGbTileMode(
         UINT_32 regValue, ADDR_TILECONFIG* pCfg) const;
 
diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp
index 902e9f2..4d791ce 100644
--- a/src/amd/addrlib/r800/siaddrlib.cpp
+++ b/src/amd/addrlib/r800/siaddrlib.cpp
@@ -2809,10 +2809,55 @@ BOOL_32 SiAddrLib::HwlOverrideTileMode(
     if (tileMode != *pTileMode)
     {
         *pTileMode = tileMode;
         bOverrided = TRUE;
         ADDR_ASSERT(pIn->flags.prt == TRUE);
     }
 
     return bOverrided;
 }
 
+/**
+***************************************************************************************************
+*   SiAddrLib::HwlGetMaxAlignments
+*
+*   @brief
+*       Gets maximum alignments
+*   @return
+*       ADDR_E_RETURNCODE
+***************************************************************************************************
+*/
+ADDR_E_RETURNCODE SiAddrLib::HwlGetMaxAlignments(
+    ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut    ///< [out] output structure
+    ) const
+{
+    const UINT_32 pipes = HwlGetPipes(&m_tileTable[0].info);
+
+    // Initial size is 64 KiB for PRT.
+    UINT_64 maxBaseAlign = 64 * 1024;
+
+    for (UINT_32 i = 0; i < m_noOfEntries; i++)
+    {
+        if ((IsMacroTiled(m_tileTable[i].mode) == TRUE) &&
+            (IsPrtTileMode(m_tileTable[i].mode) == FALSE))
+        {
+            // The maximum tile size is 16 byte-per-pixel and either 8-sample or 8-slice.
+            UINT_32 tileSize = Min(m_tileTable[i].info.tileSplitBytes,
+                                   MicroTilePixels * 8 * 16);
+
+            UINT_64 baseAlign = tileSize * pipes * m_tileTable[i].info.banks *
+                                m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight;
+
+            if (baseAlign > maxBaseAlign)
+            {
+                maxBaseAlign = baseAlign;
+            }
+        }
+    }
+
+    if (pOut != NULL)
+    {
+        pOut->baseAlign = maxBaseAlign;
+    }
+
+    return ADDR_OK;
+}
diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h
index 034001a..04f7adc 100644
--- a/src/amd/addrlib/r800/siaddrlib.h
+++ b/src/amd/addrlib/r800/siaddrlib.h
@@ -220,20 +220,22 @@ protected:
         UINT_32* pNumSamples) const;
 
     virtual BOOL_32 HwlReduceBankWidthHeight(
         UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
         UINT_32 bankHeightAlign, UINT_32 pipes,
         ADDR_TILEINFO* pTileInfo) const
     {
         return TRUE;
     }
 
+    virtual ADDR_E_RETURNCODE HwlGetMaxAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
+
     // Protected non-virtual functions
     VOID ComputeTileCoordFromPipeAndElemIdx(
         UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile,
         UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const;
 
     UINT_32 TileCoordToMaskElementIndex(
         UINT_32 tx, UINT_32 ty, AddrPipeCfg  pipeConfig,
         UINT_32 *macroShift, UINT_32 *elemIdxBits) const;
 
     BOOL_32 DecodeGbRegs(
-- 
2.7.4



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