April 2015 Archives by date

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Starting: Wed Apr 1 01:14:53 PDT 2015
Ending: Wed Apr 29 22:49:36 PDT 2015
Messages: 190

• [Beignet] [patch v2 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Weng, Chuanbo
• [Beignet] [patch v2 2/2] add benckmark for copy data from buffer to image.   Weng, Chuanbo
• [Beignet] [PATCH] GBE: correct the instruction replacement logic in scalarize pass.   Zhigang Gong
• [Beignet] [patch v2 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Luo, Xionghu
• [Beignet] [PATCH] GBE: skip current BB if it is not in a PN node's incoming BB list.   Zhigang Gong
• [Beignet] [PATCH OpenCL 2.0] Backend: Update the workgroup instructions for llvm backend to gen.   Zhigang Gong
• [Beignet] [PATCH] GBE: fix an potential assertion in constant expanding pass.   Zhigang Gong
• [Beignet] [PATCH v2 3/3] Add document to describe the detials of v4l2 buffer sharing.   Zhigang Gong
• [Beignet] [PATCH] BDW: Refine unpacked_ud in the gen8_context.cpp.   Zhigang Gong
• [Beignet] [PATCH 1/2] CHV: Add cherryview support in the runtime.   Zhigang Gong
• [Beignet] [PATCH 1/2] CHV: Add cherryview support in the runtime.   Zhigang Gong
• [Beignet] [patch v2 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Weng, Chuanbo
• [Beignet] [PATCH] benchmark: add vp9_inter_pred.   Zhong Cong
• [Beignet] [patch v2 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Luo, Xionghu
• [Beignet] [PATCH 1/2] [opencl-2.0] enable create image 2d from buffer in clCreateImage.   xionghu.luo at intel.com
• [Beignet] [PATCH 2/2] [opencl-2.0] add utest for creating 2d image from buffer.   xionghu.luo at intel.com
• [Beignet] [PATCH 1/2] add 3 simd level built-in functions: shuffle, simdsize and simdid   Yang, Rong R
• [Beignet] [PATCH] GBE: skip current BB if it is not in a PN node's incoming BB list.   Song, Ruiling
• [Beignet] [PATCH] BDW: Refine unpacked_ud in the gen8_context.cpp.   Yang, Rong R
• [Beignet] [PATCH] GBE: fix an potential assertion in constant expanding pass.   Song, Ruiling
• [Beignet] [PATCH 1/2] CHV: Add cherryview support in the runtime.   Jeff McGee
• [Beignet] Fwd: ICD interface (only) broken on Haswell   Rebecca N. Palmer
• [Beignet] Compiling Beignet on Ubuntu 14.04   Matthias Peter Walther
• [Beignet] Compiling Beignet on Ubuntu 14.04   Rebecca N. Palmer
• [Beignet] Fwd: ICD interface (only) broken on Haswell   David Couturier
• [Beignet] Compiling Beignet on Ubuntu 14.04   Matthias Peter Walther
• [Beignet] ICD interface (only) broken on Haswell   Rebecca N. Palmer
• [Beignet] Haswell-ULT Support?   Julian Simioni
• [Beignet] silently does nothing on large arrays (was ICD interface (only) broken on Haswell)   Rebecca N. Palmer
• [Beignet] [PATCH 1/2] add 3 simd level built-in functions: shuffle, simdsize and simdid   Guo, Yejun
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] silently does nothing on large arrays (was ICD interface (only) broken on Haswell)   Zhigang Gong
• [Beignet] [PATCH] GBE: skip current BB if it is not in a PN node's incoming BB list.   Zhigang Gong
• [Beignet] Haswell-ULT Support?   Rebecca N. Palmer
• [Beignet] Haswell-ULT Support?   Julian Simioni
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] [PATCH] Fix a segmentation fault.   Zhigang Gong
• [Beignet] [PATCH v3 1/2] Add example to show v4l2 buffer sharing with extension clGetMemObjectFdIntel.   Chuanbo Weng
• [Beignet] [PATCH v3 2/2] Add document to describe the detials of v4l2 buffer sharing.   Chuanbo Weng
• [Beignet] [PATCH v2 3/3] Add document to describe the detials of v4l2 buffer sharing.   Weng, Chuanbo
• [Beignet] [patch v2 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Weng, Chuanbo
• [Beignet] Haswell-ULT Support?   Rebecca N. Palmer
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] Haswell-ULT Support?   Julian Simioni
• [Beignet] [PATCH] Fix a segmentation fault.   Yang, Rong R
• [Beignet] [PATCH 1/2] CHV: Add cherryview support in the runtime.   Yang, Rong R
• [Beignet] [patch v3 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   xionghu.luo at intel.com
• [Beignet] [patch v3 2/2] add benckmark for copy data from buffer to image.   xionghu.luo at intel.com
• [Beignet] [PATCH v3 1/2] Add example to show v4l2 buffer sharing with extension clGetMemObjectFdIntel.   Zhenyu Wang
• [Beignet] [PATCH] GBE: correct some temporary virtual register's simdWidth.   Zhigang Gong
• [Beignet] [PATCH] Fix a segmentation fault.   Zhigang Gong
• [Beignet] [PATCH v3 1/2] Add example to show v4l2 buffer sharing with extension clGetMemObjectFdIntel.   Weng, Chuanbo
• [Beignet] [PATCH v3 1/2] Add example to show v4l2 buffer sharing with extension clGetMemObjectFdIntel.   Zhenyu Wang
• [Beignet] [PATCH v3 1/2] Add example to show v4l2 buffer sharing with extension clGetMemObjectFdIntel.   Yuan, Feng
• [Beignet] Haswell-ULT Support?   Julian Simioni
• [Beignet] [PATCH] runtime: Enhance the error handling when flush gpgpu command queue.   Zhigang Gong
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Zhigang Gong
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Zhigang Gong
• [Beignet] [PATCH] Fix the wrong comments for emitAtomicInst   junyan.he at inbox.com
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Zhigang Gong
• [Beignet] [PATCH 1/2] add 3 simd level built-in functions: shuffle, simdsize and simdid   Yang, Rong R
• [Beignet] [PATCH 1/2] add 3 simd level built-in functions: shuffle, simdsize and simdid   Guo, Yejun
• [Beignet] [PATCH] runtime: Enhance the error handling when flush gpgpu command queue.   Yang, Rong R
• [Beignet] [PATCH] Fix the wrong comments for emitAtomicInst   Yang, Rong R
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Yang, Rong R
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] Haswell-ULT Support?   Rebecca N. Palmer
• [Beignet] [PATCH] GBE: fix a bug in byte scatter write.   Zhigang Gong
• [Beignet] [patch v3 1/2] Optimization of clEnqueueCopyBufferToImage for 16 aligned case.   Weng, Chuanbo
• [Beignet] [PATCH 1/8] strip unsupported attributes and calling conventions.   Yang, Rong R
• [Beignet] [PATCH] GBE: correct the instruction replacement logic in scalarize pass.   Yang, Rong R
• [Beignet] [Patch V2] BDW: Refine unpacked_ud in the gen8_context.cpp.   Zhigang Gong
• [Beignet] [PATCH] GBE: fix a bug in byte scatter write.   Yang, Rong R
• [Beignet] [Patch V2] BDW: Refine unpacked_ud in the gen8_context.cpp.   Yang Rong
• [Beignet] CL_INVALID_CONTEXT   Jan-Niclas Hilgert
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Zhigang Gong
• [Beignet] [PATCH] GBE: correct some temporary virtual register's simdWidth.   Zhigang Gong
• [Beignet] [PATCH 1/2] runtime: don't try to open nonexistent render nodes or device files.   Zhigang Gong
• [Beignet] [PATCH 2/2] utests: don't continue to run any case when fail to initialize device.   Zhigang Gong
• [Beignet] CL_INVALID_CONTEXT   Zhigang Gong
• [Beignet] [PATCH] GBE: avoid to use the GenRegister::xxxgrf(simdWidth, xxx).   Zhigang Gong
• [Beignet] [Patch V2 1/2] CHV: Add cherryview support in the runtime.   Yang Rong
• [Beignet] [Patch V2 2/2] Chv: Add chv backend support.   Yang Rong
• [Beignet] [PATCH 2/2] utests: don't continue to run any case when fail to initialize device.   Yang, Rong R
• [Beignet] [PATCH] GBE: should initialize useDWLabel to false by default.   Zhigang Gong
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] [PATCH] GBE: should initialize useDWLabel to false by default.   Guo, Yejun
• [Beignet] [PATCH] GBE: should initialize useDWLabel to false by default.   Yang, Rong R
• [Beignet] Haswell-ULT Support?   Zhigang Gong
• [Beignet] Compiling Beignet on Ubuntu 14.04   Zhigang Gong
• [Beignet] Haswell-ULT Support?   Meng, Mengmeng
• [Beignet] [PATCH 1/2] add simd level function __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH] Kill the A0 cache in GenContext.   junyan.he at inbox.com
• [Beignet] [PATCH] add render cache data port disassembly info.   xionghu.luo at intel.com
• [Beignet] [PATCH] Kill the A0 cache in GenContext.   Song, Ruiling
• [Beignet] [PATCH 1/2] add simd level function __gen_ocl_get_simd_size   Guo, Yejun
• [Beignet] [PATCH 1/2] Refine the disasm for imm source.   junyan.he at inbox.com
• [Beignet] [PATCH 2/2] Use 4bits vector immediate to optimize the a0 setting.   junyan.he at inbox.com
• [Beignet] [PATCH V2 1/2] add simd level function __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH V3 1/2] add simd level function __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH V3 1/2] add simd level function __gen_ocl_get_simd_size   Yang, Rong R
• [Beignet] [PATCH V3 1/2] add simd level function __gen_ocl_get_simd_size   Guo, Yejun
• [Beignet] [PATCH V4 1/2] add simd level function __gen_ocl_get_simd_size   Guo Yejun
• [Beignet] [PATCH V4 1/2] add simd level function __gen_ocl_get_simd_size   Yang, Rong R
• [Beignet] [PATCH 1/2] add simd level function __gen_ocl_get_simd_id   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_id   Guo Yejun
• [Beignet] [ANNOUNCE] Beignet 1.0.3 (2015-04-17)   Zhigang Gong
• [Beignet] [PATCH V2 1/2] add simd level function __gen_ocl_get_simd_id   Guo Yejun
• [Beignet] [PATCH V2 1/2] add simd level function __gen_ocl_get_simd_id   Yang, Rong R
• [Beignet] [PATCH] Make tgamma meet the accuracy standard   Rebecca N. Palmer
• [Beignet] [PATCH] utest_pow: don't fail on declared lack of denormals   Rebecca N. Palmer
• [Beignet] 9e8874c breaking (more) Haswell systems?   Rebecca N. Palmer
• [Beignet] [PATCH] LLVM/Clang 3.7 compatibility   linedot
• [Beignet] [PATCH V2 1/2] add simd level function __gen_ocl_get_simd_id   Guo, Yejun
• [Beignet] [PATCH V2 1/2] add simd level function __gen_ocl_get_simd_id   Guo, Yejun
• [Beignet] [PATCH] add atomic operators output for GEN_IR and gen disa.   xionghu.luo at intel.com
• [Beignet] [PATCH V3 1/2] add simd level function __gen_ocl_get_simd_id   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_id   Guo Yejun
• [Beignet] [PATCH 1/5 OpenCL-2.0] libocl: Add the module for work_group functions.   junyan.he at inbox.com
• [Beignet] [PATCH 2/5 OpenCL-2.0] Add the WorkGroupInstruction as a new type of instruction.   junyan.he at inbox.com
• [Beignet] [PATCH 3/5 OpenCL-2.0] Add WorkGroup functions to Gen IR logic in llvm_gen_backend.   junyan.he at inbox.com
• [Beignet] [PATCH 4/5 OpenCL-2.0] Handle the WorkGroup_Broadcast logic in insn_selection.   junyan.he at inbox.com
• [Beignet] [PATCH 5/5 OpenCL-2.0] Add utest for workgroup_broadcast.   junyan.he at inbox.com
• [Beignet] [PATCH 01/10 OpenCL-2.0] Add slm usage for establishing the thread/TID-EUID map.   junyan.he at inbox.com
• [Beignet] [PATCH 02/10 OpenCL-2.0] Add threadid and threadn register into curbe.   junyan.he at inbox.com
• [Beignet] [PATCH 03/10 OpenCL-2.0] Add the store and load for thead/TID-EUID map.   junyan.he at inbox.com
• [Beignet] [PATCH 04/10 OpenCL-2.0] Correct the register order and wellform of WorkGroupInstruction.   junyan.he at inbox.com
• [Beignet] [PATCH 05/10 OpenCL-2.0] Add subnr to notification register.   junyan.he at inbox.com
• [Beignet] [PATCH 06/10 OpenCL-2.0] Add WORKGROUP_OP instruction selection.   junyan.he at inbox.com
• [Beignet] [PATCH 07/10 OpenCL-2.0] Add forward message function for gen encoder.   junyan.he at inbox.com
• [Beignet] [PATCH 08/10 OpenCL-2.0] Add state register into schedule consideration.   junyan.he at inbox.com
• [Beignet] [PATCH 09/10 OpenCL-2.0] Use forward message to handle work group functions.   junyan.he at inbox.com
• [Beignet] [PATCH 10/10 OpenCL-2.0] Add test case for work group reduce min.   junyan.he at inbox.com
• [Beignet] [PATCH] utest_pow: don't fail on declared lack of denormals   Song, Ruiling
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Ruiling Song
• [Beignet] [PATCH] Make tgamma meet the accuracy standard   Song, Ruiling
• [Beignet] 9e8874c breaking (more) Haswell systems?   Zhenyu Wang
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Rebecca N. Palmer
• [Beignet] [PATCH V3 1/2] add simd level function __gen_ocl_get_simd_id   Yang, Rong R
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Song, Ruiling
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_get_simd_id   Yang, Rong R
• [Beignet] [PATCH V4 1/2] add simd level function __gen_ocl_get_simd_size   Yang, Rong R
• [Beignet] 9e8874c breaking (more) Haswell systems?   Zhigang Gong
• [Beignet] [PATCH 1/2] add simd level function __gen_ocl_simd_shuffle   Guo Yejun
• [Beignet] [PATCH 2/2] add utest for __gen_ocl_simd_shuffle   Guo Yejun
• [Beignet] [PATCH] Allow building with Python 3   Rebecca N. Palmer
• [Beignet] Haswell issues   Rebecca N. Palmer
• [Beignet] Problems and questions when using Beignet   gss at mail.ustc.edu.cn
• [Beignet] Problems and questions when using Beignet   gss at mail.ustc.edu.cn
• [Beignet] Problems and questions when using Beignet   Rebecca N. Palmer
• [Beignet] [PATCH] Make __local on Haswell an error, instead of silently doing nothing   Rebecca N. Palmer
• [Beignet] Where's the test failure with clang 3.6?   Rebecca N. Palmer
• [Beignet] Where's the test failure with clang 3.6?   Zhigang Gong
• [Beignet] [PATCH] Make __local on Haswell an error, instead of silently doing nothing   Zhigang Gong
• [Beignet] Must   Zhigang Gong
• [Beignet] Haswell issues   Zhigang Gong
• [Beignet] Must   Gao, Sanshan
• [Beignet] [Patch V2 1/2] CHV: Add cherryview support in the runtime.   Yang Rong
• [Beignet] [Patch V2 2/2] Chv: Add chv backend support.   Yang Rong
• [Beignet] [PATCH] Allow building with Python 3   Zhigang Gong
• [Beignet] [PATCH] Make tgamma meet the accuracy standard   Zhigang Gong
• [Beignet] [PATCH] utest_pow: don't fail on declared lack of denormals   Zhigang Gong
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Zhigang Gong
• [Beignet] [PATCH 1/4] [opencl-2.0] icd API update for opencl 2.0.   xionghu.luo at intel.com
• [Beignet] [PATCH 2/4] [opencl-2.0] clCreateSampler replaced by clCreateSamplerWithProperties.   xionghu.luo at intel.com
• [Beignet] [PATCH 3/4] [opencl-2.0] replace API clCreateCommandQueueWithProperties.   xionghu.luo at intel.com
• [Beignet] [PATCH 4/4] [opencl-2.0] clEnqueueTask deprecated in opencl-2.0.   xionghu.luo at intel.com
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Song, Ruiling
• [Beignet] [Patch V2 1/2] CHV: Add cherryview support in the runtime.   Yang Rong
• [Beignet] [Patch V2 2/2] Chv: Add chv backend support.   Yang Rong
• [Beignet] [PATCH] Allow building with Python 3   Zhigang Gong
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Zhigang Gong
• [Beignet] Must   Zhigang Gong
• [Beignet] iceweasel mangling patches   Zhigang Gong
• [Beignet] [PATCH] Allow building with Python 3   Rebecca N. Palmer
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Rebecca N. Palmer
• [Beignet] iceweasel mangling patches   Rebecca N. Palmer
• [Beignet] Haswell issues   Rebecca N. Palmer
• [Beignet] [PATCH] utests: fix test case builtin_tgamma.   Rebecca N. Palmer
• [Beignet] Haswell issues   Zhigang Gong
• [Beignet] [PATCH 1/4] GBE: make all memory operation share same bti dependency.   Ruiling Song
• [Beignet] [PATCH 2/4] GBE: Fix the immediate data type   Ruiling Song
• [Beignet] [PATCH 3/4] GBE: remove unnecessary assert   Ruiling Song
• [Beignet] [PATCH 4/4] gbe: Implement a new BTI solution to support dynamic bti   Ruiling Song
• [Beignet] Haswell issues   Andi Kleen
• [Beignet] Haswell issues   Zhigang Gong
• [Beignet] [PATCH OpenCL 2.0] Backend: Update the workgroup instructions for llvm backend to gen.   Zhigang Gong

Last message date: Wed Apr 29 22:49:36 PDT 2015
Archived on: Wed Apr 29 23:53:26 PDT 2015

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